7 research outputs found

    Design of large polyphase filters in the Quadratic Residue Number System

    Full text link

    Temperature aware power optimization for multicore floating-point units

    Full text link

    JTIT

    Get PDF
    kwartalni

    WOFEX 2021 : 19th annual workshop, Ostrava, 1th September 2021 : proceedings of papers

    Get PDF
    The workshop WOFEX 2021 (PhD workshop of Faculty of Electrical Engineer-ing and Computer Science) was held on September 1st September 2021 at the VSB – Technical University of Ostrava. The workshop offers an opportunity for students to meet and share their research experiences, to discover commonalities in research and studentship, and to foster a collaborative environment for joint problem solving. PhD students are encouraged to attend in order to ensure a broad, unconfined discussion. In that view, this workshop is intended for students and researchers of this faculty offering opportunities to meet new colleagues.Ostrav

    Communication of uncoded sensor measurements through nanoscale binary-node stochastic pooling networks

    No full text
    International audienceIn recent work we defined a concept referred to as stochastic pooling networks, to describe a class of network structures in which various unexpected emergent features have been observed. Examples of stochastic pooling networks can be found in a diverse range of scientific and engineering contexts, as well as across a vast range of scales, ranging from macroscopic social networks to nanoscale electronics. Here we discuss the relevance of the stochastic pooling network concept to the design of communication and sensing networks at the nanoscale. The information theoretic limits to the performance of such networks when employed to communicate sensor measurements are analysed, and shown to compare favorably with the best possible choice of communication scheme. Optimization of the network in the presence of noise finds that a partially homogeneous network improves performance, and thus suggests an approach to simplifying the design of nanoscale analog-to-digital converters and sensor networks
    corecore