8,175 research outputs found
Performance Evaluation of Impulse Radio UWB Systems with Pulse-Based Polarity Randomization
In this paper, the performance of a binary phase shift keyed random
time-hopping impulse radio system with pulse-based polarity randomization is
analyzed. Transmission over frequency-selective channels is considered and the
effects of inter-frame interference and multiple access interference on the
performance of a generic Rake receiver are investigated for both synchronous
and asynchronous systems. Closed form (approximate) expressions for the
probability of error that are valid for various Rake combining schemes are
derived. The asynchronous system is modelled as a chip-synchronous system with
uniformly distributed timing jitter for the transmitted pulses of interfering
users. This model allows the analytical technique developed for the synchronous
case to be extended to the asynchronous case. An approximate closed-form
expression for the probability of bit error, expressed in terms of the
autocorrelation function of the transmitted pulse, is derived for the
asynchronous case. Then, transmission over an additive white Gaussian noise
channel is studied as a special case, and the effects of multiple-access
interference is investigated for both synchronous and asynchronous systems. The
analysis shows that the chip-synchronous assumption can result in
over-estimating the error probability, and the degree of over-estimation mainly
depends on the autocorrelation function of the ultra-wideband pulse and the
signal-to-interference-plus-noise-ratio of the system. Simulations studies
support the approximate analysis.Comment: To appear in the IEEE Transactions on Signal Processin
Asynchronous Channel Training in Multi-Cell Massive MIMO
Pilot contamination has been regarded as the main bottleneck in time division
duplexing (TDD) multi-cell massive multiple-input multiple-output (MIMO)
systems. The pilot contamination problem cannot be addressed with large-scale
antenna arrays. We provide a novel asynchronous channel training scheme to
obtain precise channel matrices without the cooperation of base stations. The
scheme takes advantage of sampling diversity by inducing intentional timing
mismatch. Then, the linear minimum mean square error (LMMSE) estimator and the
zero-forcing (ZF) estimator are designed. Moreover, we derive the minimum
square error (MSE) upper bound of the ZF estimator. In addition, we propose the
equally-divided delay scheme which under certain conditions is the optimal
solution to minimize the MSE of the ZF estimator employing the identity matrix
as pilot matrix. We calculate the uplink achievable rate using maximum ratio
combining (MRC) to compare asynchronous and synchronous channel training
schemes. Finally, simulation results demonstrate that the asynchronous channel
estimation scheme can greatly reduce the harmful effect of pilot contamination
Desynchronization: Synthesis of asynchronous circuits from synchronous specifications
Asynchronous implementation techniques, which measure logic delays at run time and activate registers accordingly, are inherently more robust than their synchronous counterparts, which estimate worst-case delays at design time, and constrain the clock cycle accordingly. De-synchronization is a new paradigm to automate the design of asynchronous circuits from synchronous specifications, thus permitting widespread adoption of asynchronicity, without requiring special design skills or tools. In this paper, we first of all study different protocols for de-synchronization and formally prove their correctness, using techniques originally developed for distributed deployment of synchronous language specifications. We also provide a taxonomy of existing protocols for asynchronous latch controllers, covering in particular the four-phase handshake protocols devised in the literature for micro-pipelines. We then propose a new controller which exhibits provably maximal concurrency, and analyze the performance of desynchronized circuits with respect to the original synchronous optimized implementation. We finally prove the feasibility and effectiveness of our approach, by showing its application to a set of real designs, including a complete implementation of the DLX microprocessor architectur
Asynchronous techniques for system-on-chip design
SoC design will require asynchronous techniques as the large parameter variations across the chip will make it impossible to control delays in clock networks and other global signals efficiently. Initially, SoCs will be globally asynchronous and locally synchronous (GALS). But the complexity of the numerous asynchronous/synchronous interfaces required in a GALS will eventually lead to entirely asynchronous solutions. This paper introduces the main design principles, methods, and building blocks for asynchronous VLSI systems, with an emphasis on communication and synchronization. Asynchronous circuits with the only delay assumption of isochronic forks are called quasi-delay-insensitive (QDI). QDI is used in the paper as the basis for asynchronous logic. The paper discusses asynchronous handshake protocols for communication and the notion of validity/neutrality tests, and completion tree. Basic building blocks for sequencing, storage, function evaluation, and buses are described, and two alternative methods for the implementation of an arbitrary computation are explained. Issues of arbitration, and synchronization play an important role in complex distributed systems and especially in GALS. The two main asynchronous/synchronous interfaces needed in GALS-one based on synchronizer, the other on stoppable clock-are described and analyzed
Initial synchronisation of wideband and UWB direct sequence systems: single- and multiple-antenna aided solutions
This survey guides the reader through the open literature on the principle of initial synchronisation in single-antenna-assisted single- and multi-carrier Code Division Multiple Access (CDMA) as well as Direct Sequence-Ultra WideBand (DS-UWB) systems, with special emphasis on the DownLink (DL). There is a paucity of up-to-date surveys and review articles on initial synchronization solutions for MIMO-aided and cooperative systems - even though there is a plethora of papers on both MIMOs and on cooperative systems, which assume perfect synchronization. Hence this paper aims to ?ll the related gap in the literature
Interference-Free Broadband Single- and Multi-Carrier DS-CDMA
The choice of the direct sequence spreading code in DS-CDMA predetermines the properties of the system. This contribution demonstrates that the family of codes exhibiting an interference-free window (IFW) outperforms classic spreading codes, provided that the interfering multi-user and multipath components arrive within this IFW, which may be ensured with the aid of quasi-synchronous adaptive timing advance control. It is demonstrated that the IFW duration may be extended with the advent of multicarrier DS-CDMA proportionately to the number of subcarriers. Hence, the resultant MC DS-CDMA system is capable of exhibiting nearsingle-user performance without employing a multi-user detector. A limitation of the system is that the number of spreading codes exhibiting a certain IFW is limited, although this problem may be mitigated with the aid of novel code design principles
Implementable Wireless Access for B3G Networks - III: Complexity Reducing Transceiver Structures
This article presents a comprehensive overview of some of the research conducted within Mobile VCE’s Core Wireless Access Research Programme,1 a key focus of which has naturally been on MIMO transceivers. The series of articles offers a coherent view of how the work was structured and comprises a compilation of material that has been presented in detail elsewhere (see references within the article). In this article MIMO channel measurements, analysis, and modeling, which were presented previously in the first article in this series of four, are utilized to develop compact and distributed antenna arrays. Parallel activities led to research into low-complexity MIMO single-user spacetime coding techniques, as well as SISO and MIMO multi-user CDMA-based transceivers for B3G systems. As well as feeding into the industry’s in-house research program, significant extensions of this work are now in hand, within Mobile VCE’s own core activity, aiming toward securing major improvements in delivery efficiency in future wireless systems through crosslayer operation
Efficient Fast-Convolution-Based Waveform Processing for 5G Physical Layer
This paper investigates the application of fast-convolution (FC) filtering
schemes for flexible and effective waveform generation and processing in the
fifth generation (5G) systems. FC-based filtering is presented as a generic
multimode waveform processing engine while, following the progress of 5G new
radio standardization in the Third-Generation Partnership Project, the main
focus is on efficient generation and processing of subband-filtered cyclic
prefix orthogonal frequency-division multiplexing (CP-OFDM) signals. First, a
matrix model for analyzing FC filter processing responses is presented and used
for designing optimized multiplexing of filtered groups of CP-OFDM physical
resource blocks (PRBs) in a spectrally well-localized manner, i.e., with narrow
guardbands. Subband filtering is able to suppress interference leakage between
adjacent subbands, thus supporting independent waveform parametrization and
different numerologies for different groups of PRBs, as well as asynchronous
multiuser operation in uplink. These are central ingredients in the 5G waveform
developments, particularly at sub-6-GHz bands. The FC filter optimization
criterion is passband error vector magnitude minimization subject to a given
subband band-limitation constraint. Optimized designs with different guardband
widths, PRB group sizes, and essential design parameters are compared in terms
of interference levels and implementation complexity. Finally, extensive coded
5G radio link simulation results are presented to compare the proposed approach
with other subband-filtered CP-OFDM schemes and time-domain windowing methods,
considering cases with different numerologies or asynchronous transmissions in
adjacent subbands. Also the feasibility of using independent transmitter and
receiver processing for CP-OFDM spectrum control is demonstrated
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