Digital Radio Encoding and Power Amplifier Design for Multimode and Multiband Wireless Communications

The evolution of wireless technology has necessitated the support of multiple communication standards by mobile devices. At present, multiple chipsets/radios operating at predefined sets of modulation schemes, frequency bands, bandwidths and output power levels are used to achieve this objective. This leads to higher component counts, increased cost and limits the capacity to cope with future communication standards. In order to tackle different wireless standards using a single chipset, digital circuits have been increasingly deployed in radios and demonstrated re-configurability in different modulation schemes (multimode) and frequency bands (multiband). Despite efforts and progress made in digitizing the entire radio, the power amplifier (PA) is still designed using an conventional approach and has become the bottleneck in digital transmitters, in terms of low average power efficiency, poor compatibility with modern CMOS technology and limited re-configurability. This research addresses these issues from two aspects. The first half of the thesis investigates signal encoding issues between the modulator and PA. We propose, analyze and evaluate a new hybrid amplitude/time signal encoding scheme that significantly improves the coding efficiency and dynamic range of a digitally modulated power amplifier (DMPA) without significantly increasing design complexity. The proposed hybrid amplitude/time encoding scheme combines both the amplitude domain and the time domain to optimally encode information. Experimental results show that hybrid amplitude/time encoding results in a 35% increase in the average coding efficiency with respect to conventional time encoding, and is only 6.7% lower than peak efficiency when applied to a Wireless Local Area Network (WLAN) signal with a peak to average power ratio equal to 9.9 dB. A new DMPA architecture, based on the proposed hybrid encoding, is also proposed. The second half of this thesis presents the design, analysis and implementation of a CMOS PA that is amenable to the proposed hybrid encoding scheme. A multi-way current mode class-D PA architecture has been proposed and realized in 130 nm CMOS technology. The designed PA has satisfied the objectives of wide bandwidth (1.5 GHz - 2.7 GHz at 1 dB output power), and high efficiency (PAE 63%) in addition to demonstrating linear responses using the proposed digital encoding. A complete digital transmitter combining the encoder and the multi-way PA was also investigated. The overall efficiency is 27% modulating 7.3 dB peak to average power ratio QAM signals

CMOS Data Converters for Closed-Loop mmWave Transmitters

With the increased amount of data consumed in mobile communication systems, new solutions for the infrastructure are needed. Massive multiple input multiple output (MIMO) is seen as a key enabler for providing this increased capacity. With the use of a large number of transmitters, the cost of each transmitter must be low. Closed-loop transmitters, featuring high-speed data converters is a promising option for achieving this reduced unit cost.In this thesis, both digital-to-analog (D/A) and analog-to-digital (A/D) converters suitable for wideband operation in millimeter wave (mmWave) massive MIMO transmitters are demonstrated. A 2 76 bit radio frequency digital-to-analog converter (RF-DAC)-based in-phase quadrature (IQ) modulator is demonstrated as a compact building block, that to a large extent realizes the transmit path in a closed-loop mmWave transmitter. The evaluation of an successive-approximation register (SAR) analog-to-digital converter (ADC) is also presented in this thesis. Methods for connecting simulated and measured performance has been studied in order to achieve a better understanding about the alternating comparator topology.These contributions show great potential for enabling closed-loop mmWave transmitters for massive MIMO transmitter realizations

Wideband CMOS Data Converters for Linear and Efficient mmWave Transmitters

With continuously increasing demands for wireless connectivity, higher\ua0carrier frequencies and wider bandwidths are explored. To overcome a limited transmit power at these higher carrier frequencies, multiple\ua0input multiple output (MIMO) systems, with a large number of transmitters\ua0and antennas, are used to direct the transmitted power towards\ua0the user. With a large transmitter count, each individual transmitter\ua0needs to be small and allow for tight integration with digital circuits. In\ua0addition, modern communication standards require linear transmitters,\ua0making linearity an important factor in the transmitter design.In this thesis, radio frequency digital-to-analog converter (RF-DAC)-based transmitters are explored. They shift the transition from digital\ua0to analog closer to the antennas, performing both digital-to-analog\ua0conversion and up-conversion in a single block. To reduce the need for\ua0computationally costly digital predistortion (DPD), a linear and wellbehaved\ua0RF-DAC transfer characteristic is desirable. The combination\ua0of non-overlapping local oscillator (LO) signals and an expanding segmented\ua0non-linear RF-DAC scaling is evaluated as a way to linearize\ua0the transmitter. This linearization concept has been studied both for\ua0the linearization of the RF-DAC itself and for the joint linearization of\ua0the cascaded RF-DAC-based modulator and power amplifier (PA) combination.\ua0To adapt the linearization, observation receivers are needed.\ua0In these, high-speed analog-to-digital converters (ADCs) have a central\ua0role. A high-speed ADC has been designed and evaluated to understand\ua0how concepts used to increase the sample rate affect the dynamic performance

Transmitter architectures with digital modulators, D/A converters and switching-mode power amplifiers

This thesis is composed of nine publications and an overview of the research topic, which also summarises the work. The research described in this thesis focuses on research into the digitalisation of wireless communication base station transmitters. In particular it has three foci: digital modulation, D/A conversion and switching-mode power amplification. The main interest in the implementation of these circuits is in CMOS. The work summarizes the designs of several circuit blocks of a wireless transmitter base station. In the baseband stage, a multicarrier digital modulator that combines multiple modulated signals at different carrier frequencies digitally at baseband, and a multimode digital modulator that can be operated for three different communications standards, are implemented as integrated circuits. The digital modulators include digital power ramping and power level control units for transmission bursts. The upconversion of the baseband signal is implemented using an integrated digital quadrature modulator. The work presented provides insight into the digital-to-analogue interface in the transmitters. This interface is studied both by implementing an intermediate frequency D/A converter in BiCMOS technology and bandpass Delta-Sigma modulator-based D/A conversion in CMOS technology. Finally, the last part of the work discusses switching-mode power amplifiers which are experimented with both as discrete and integrated implementations in conjunction with 1-bit Delta-Sigma modulation and pulse-width modulation as input signal generation methods.Tämä väitöskirja koostuu yhdeksästä julkaisusta ja tutkimusaiheen yhteenvedosta. Väitöskirjassa esitetty tutkimus keskittyy langattaman viestinnän tukiasemien lähettimien digitalisoinnin tutkimukseen. Yksityiskohtaisemmin tutkimusalueet ovat: digitaalinen modulaatio, D/A muunnos ja kytkinmuotoiset tehovahvistimet. Näiden elektronisten piirien toteutuksessa keskitytään CMOS teknologiaan. Työ vetää yhteen useiden langattoman viestinnän tukiasemien lähettimien piirilohkojen suunnittelun. Kantataajuusasteella toteutetaan integroituna piirinä monikantoaaltoinen digitaalinen modulaattori, joka yhdistää useita moduloituja signaaleja eri kantoaalloilla digitaalisesti ja monistandardi digitaalinen modulaatori, joka tukee kolmea eri viestintästandardia. Digitaaliset modulaattoripiirit sisältävät digitaalisen tehoramping ja tehotason säätöyksikön lähetyspurskeita varten. Kantataajuussignaalin ylössekoitus toteutetaan integroitua digitaalista kvadratuurimodulaattoria käyttäen. Esitetty työ antaa näkemystä lähettimien digitalia-analogia rajapintaan, jota tutkitaan toteuttamalla välitaajuinen D/A muunnin BiCMOS teknologialla ja päästökaistainen Delta-Sigma-modulaattoripohjainen D/A muunnin CMOS teknologialla. Lopuksi työn viimeinen osa käsittelee kytkinmuotoisia tehovahvistimia, joita tutkitaan kokeellisesti sekä erilliskompontein toteutettuina piirein että integroiduin piirein toteutettuina käyttäen sisääntulosignaalin muodostamismenetemänä yksibittistä Delta-Sigma-modulaatiota ja pulssin leveys modulaatiota.reviewe

RF Power Amplifier and Its Envelope Tracking

This dissertation introduces an agile supply modulator with optimal transient performance for the envelope tracking supply in linear power amplifiers. For this purpose, an on-demand current source module, the bang-bang transient performance enhancer (BBTPE), is proposed. Its objective is to follow fast variations in input signals with reduced overshoot and settling time without deteriorating the steady-state performance of the buck regulator. The proposed approach enables fast system response through the BBTPE and an accurate steady-state output response through a low switching ripple and power efficient dynamic buck regulator. Fast output response with the help of the added module induces a slower rise of inductor current in the buck converter that further assists the proposed system to reduce both overshoot and settling time. To demonstrate the feasibility of the proposed solution, extensive simulations and experimental results from a discrete system are reported. The proposed supply modulator shows 80% improvement in rise time along with 60% reduction in both overshoot and settling time compared to the conventional dynamic buck regulator-based solution. Experimental results for a PA using the LTE 16-QAM 5 MHz standard shows improvement of 7.68 dB and 65.1% in ACPR and EVM, respectively. In a polar power amplifier, the input signal splits into phase and amplitude components using a non-linear conversion operation. This operation broadens the spectrum of the polar signal components. The information of amplitude and phase contains spectral images due to the sampling operation in non-linear conversion operation. These spectral images can be large and cause out-of-band emission in the output spectrum. In addition, during the recombination process of phase and amplitude, a delay mismatch between amplitude and phase signals, which can occur due to separate processing paths of amplitude and phase signals, causes out-of-band emissions, also known as spectral regrowth. This dissertation presents solutions to both of the issues of digital polar power amplifier: spectral images and delay mismatch. In order to reduce the problem of spectral images, interpolation of phase and amplitude is proposed in this work. This increases the effective sampling frequency of the amplitude and phase, which helps to improve the linearity by around 10 dB. In addition, a novel calibration scheme is proposed here for the delay mismatch between phase and amplitude path in a digital polar power amplifier. The scheme significantly reduces the spectral regrowth. The scheme uses the same path for phase and amplitude delay calculation after the recombination that allows having a robust calibration. Furthermore, it can be executed during the empty transmission slots. The proposed scheme is designed in a 40 nm CMOS technology and simulated with a 64-QAM IEEE 802.11n wireless standard. The scheme achieved 7.57 dB enhancement in ACLR and 84.35% improvement in EVM for a 3.5 ns mismatch in phase and amplitude path

RF Power Amplifier and Its Envelope Tracking

This dissertation introduces an agile supply modulator with optimal transient performance for the envelope tracking supply in linear power amplifiers. For this purpose, an on-demand current source module, the bang-bang transient performance enhancer (BBTPE), is proposed. Its objective is to follow fast variations in input signals with reduced overshoot and settling time without deteriorating the steady-state performance of the buck regulator. The proposed approach enables fast system response through the BBTPE and an accurate steady-state output response through a low switching ripple and power efficient dynamic buck regulator. Fast output response with the help of the added module induces a slower rise of inductor current in the buck converter that further assists the proposed system to reduce both overshoot and settling time. To demonstrate the feasibility of the proposed solution, extensive simulations and experimental results from a discrete system are reported. The proposed supply modulator shows 80% improvement in rise time along with 60% reduction in both overshoot and settling time compared to the conventional dynamic buck regulator-based solution. Experimental results for a PA using the LTE 16-QAM 5 MHz standard shows improvement of 7.68 dB and 65.1% in ACPR and EVM, respectively. In a polar power amplifier, the input signal splits into phase and amplitude components using a non-linear conversion operation. This operation broadens the spectrum of the polar signal components. The information of amplitude and phase contains spectral images due to the sampling operation in non-linear conversion operation. These spectral images can be large and cause out-of-band emission in the output spectrum. In addition, during the recombination process of phase and amplitude, a delay mismatch between amplitude and phase signals, which can occur due to separate processing paths of amplitude and phase signals, causes out-of-band emissions, also known as spectral regrowth. This dissertation presents solutions to both of the issues of digital polar power amplifier: spectral images and delay mismatch. In order to reduce the problem of spectral images, interpolation of phase and amplitude is proposed in this work. This increases the effective sampling frequency of the amplitude and phase, which helps to improve the linearity by around 10 dB. In addition, a novel calibration scheme is proposed here for the delay mismatch between phase and amplitude path in a digital polar power amplifier. The scheme significantly reduces the spectral regrowth. The scheme uses the same path for phase and amplitude delay calculation after the recombination that allows having a robust calibration. Furthermore, it can be executed during the empty transmission slots. The proposed scheme is designed in a 40 nm CMOS technology and simulated with a 64-QAM IEEE 802.11n wireless standard. The scheme achieved 7.57 dB enhancement in ACLR and 84.35% improvement in EVM for a 3.5 ns mismatch in phase and amplitude path

Concurrent Dual Band Radio-over-Fiber Transmission Using 1-bit Envelope Delta-Sigma Modulation

With the growing demand for bandwidth and transmission speed, mobile communication network designs must stay adaptable, efficient and cost-effective. A key integration has been Radio-over-Fiber (RoF) transmission systems that provide a cheaper option and low loss for high frequency signal transfer. For the optical transmitter, delta-sigma modulation (DSM) can be a beneficial addition. The partnership simplifies the Digital-Radio-over-Fiber setup by removing the need for additional converters and prompts adjustments based on system need. Main factors in delta-sigma modulators are the amount of quantization bits and the order of the modulator. Changing quantization bits to a single bit allows the system to use less processing bandwidth and less error experienced from optical transmission. High order structures provide more noise shaping to shift noise away from the band of interest. Still, such setups are prone to linearity problems due to clock jitter from multiple feedback loops. Different adaptations of delta-sigma modulation have been designed to combat the problems, but a key standout is the implementation of an envelope delta-sigma modulation (EDSM). Envelope delta-sigma modulation’s separate processing of envelope and phase delivers time alignment and noise shaping counter the negative implications from high order DSMs. Combining envelope delta-sigma modulation with RoF transmission is an attractive option, but research has yet to delve into carrier aggregation with these setups. This thesis explores concurrent dual band 64-QAM 20 MHz LTE Radio-over-Fiber using 1-bit envelope delta-sigma modulation. It expands transmitter functionality by concurrent signal integration. Inside the EDSM is a 4th order bandpass delta-sigma modulator custom tailored one of two carrier frequencies. The two frequencies come from two different LTE bands to show interband compatibility. The carrier frequencies are 2.112 GHz from LTE band 1 and 2.64 GHz from LTE band 7. Simulation and experimental results confirm the functionality of the proposed envelope delta-sigma modulation RoF system in single and dual band for LTE standards (error vector magnitude < 8%). Experimental results confirm that EDSM is more resilient to RoF transmission than BP-DSM. However, the EVM values for BP-DSM are better for carrier aggregated transmission