Gleam: the GLAST Large Area Telescope Simulation Framework

This paper presents the simulation of the GLAST high energy gamma-ray telescope. The simulation package, written in C++, is based on the Geant4 toolkit, and it is integrated into a general framework used to process events. A detailed simulation of the electronic signals inside Silicon detectors has been provided and it is used for the particle tracking, which is handled by a dedicated software. A unique repository for the geometrical description of the detector has been realized using the XML language and a C++ library to access this information has been designed and implemented.Comment: 10 pages, Late

Thermal issues for the optical transition radiation screen for the ELI-NP compton gamma source

A high brightness electron LINAC is being built in the Compton Gamma Source at the ELI Nuclear Physics facility in Romania. To achieve the design luminosity, a train of 32 bunches, 16 ns spaced, with a nominal charge of 250 pC will collide with a laser beam in two interaction points. Electron beam spot size is measured with Optical Transition Radiation (OTR) profile monitors. In order to measure the beam properties, the OTR screens must sustain the thermal and mechanical stress due to the energy deposited by bunches. This paper is an ANSYS study of the issues due to the high energy transferred to the OTR screens. Thermal multicycle analysis will be shown; each analysis will be followed by a structural analysis in order to investigate the performance of the materia

Displacement damage effects due to neutron and proton irradiations on CMOS image sensors manufactured in deep submicron technology

Displacement damage effects due to proton and neutron irradiations of CMOS image sensors dedicated to imaging are presented through the analysis of the dark current behavior in pixel arrays and isolated photodiodes. The mean dark current increase and the dark current nonuniformity are investigated. Dark current histogram observations are compared to damage energy distributions based on GEANT 4 calculations. We also discuss, through annealing analysis, which defects could be responsible for the dark current in CMOS image sensors

Photonics design tool for advanced CMOS nodes

Recently, the authors have demonstrated large-scale integrated systems with several million transistors and hundreds of photonic elements. Yielding such large-scale integrated systems requires a design-for-manufacture rigour that is embodied in the 10 000 to 50 000 design rules that these designs must comply within advanced complementary metal-oxide semiconductor manufacturing. Here, the authors present a photonic design automation tool which allows automatic generation of layouts without design-rule violations. This tool is written in SKILL, the native language of the mainstream electric design automation software, Cadence. This allows seamless integration of photonic and electronic design in a single environment. The tool leverages intuitive photonic layer definitions, allowing the designer to focus on the physical properties rather than on technology-dependent details. For the first time the authors present an algorithm for removal of design-rule violations from photonic layouts based on Manhattan discretisation, Boolean and sizing operations. This algorithm is not limited to the implementation in SKILL, and can in principle be implemented in any scripting language. Connectivity is achieved with software-defined waveguide ports and low-level procedures that enable auto-routing of waveguide connections.Comment: 5 pages, 10 figure

Implications of Electronics Constraints for Solid-State Quantum Error Correction and Quantum Circuit Failure Probability

In this paper we present the impact of classical electronics constraints on a solid-state quantum dot logical qubit architecture. Constraints due to routing density, bandwidth allocation, signal timing, and thermally aware placement of classical supporting electronics significantly affect the quantum error correction circuit's error rate. We analyze one level of a quantum error correction circuit using nine data qubits in a Bacon-Shor code configured as a quantum memory. A hypothetical silicon double quantum dot quantum bit (qubit) is used as the fundamental element. A pessimistic estimate of the error probability of the quantum circuit is calculated using the total number of gates and idle time using a provably optimal schedule for the circuit operations obtained with an integer program methodology. The micro-architecture analysis provides insight about the different ways the electronics impact the circuit performance (e.g., extra idle time in the schedule), which can significantly limit the ultimate performance of any quantum circuit and therefore is a critical foundation for any future larger scale architecture analysis.Comment: 10 pages, 7 figures, 3 table

Space division multiplexing chip-to-chip quantum key distribution

Quantum cryptography is set to become a key technology for future secure communications. However, to get maximum benefit in communication networks, transmission links will need to be shared among several quantum keys for several independent users. Such links will enable switching in quantum network nodes of the quantum keys to their respective destinations. In this paper we present an experimental demonstration of a photonic integrated silicon chip quantum key distribution protocols based on space division multiplexing (SDM), through multicore fiber technology. Parallel and independent quantum keys are obtained, which are useful in crypto-systems and future quantum network