1,027 research outputs found
A Modular Programmable CMOS Analog Fuzzy Controller Chip
We present a highly modular fuzzy inference analog CMOS chip architecture with on-chip digital programmability. This chip consists of the interconnection of parameterized instances of two different kind of blocks, namely label blocks and rule blocks. The architecture realizes a lattice partition of the universe of discourse, which at the hardware level means that the fuzzy labels associated to every input (realized by the label blocks) are shared among the rule blocks. This reduces the area and power consumption and is the key point for chip modularity. The proposed architecture is demonstrated through a 16-rule two input CMOS 1-μm prototype which features an operation speed of 2.5 Mflips (2.5×10^6 fuzzy inferences per second) with 8.6 mW power consumption. Core area occupation of this prototype is of only 1.6 mm 2 including the digital control and memory circuitry used for programmability. Because of the architecture modularity the number of inputs and rules can be increased with any hardly design effort.This work was
supported in part by the Spanish C.I.C.Y.T under Contract TIC96-1392-C02-
02 (SIVA)
Neuro-fuzzy chip to handle complex tasks with analog performance
This paper presents a mixed-signal neuro-fuzzy controller chip which, in terms of power consumption, input–output delay, and precision, performs as a fully analog implementation.
However, it has much larger complexity than its purely analog counterparts. This combination of performance and complexity is achieved through the use of a mixed-signal architecture consisting
of a programmable analog core of reduced complexity, and a strategy, and the associated mixed-signal circuitry, to cover the whole input space through the dynamic programming of this core.
Since errors and delays are proportional to the reduced number of fuzzy rules included in the analog core, they are much smaller than in the case where the whole rule set is implemented by analog circuitry. Also, the area and the power consumption of the new architecture
are smaller than those of its purely analog counterparts simply because most rules are implemented through programming.
The Paper presents a set of building blocks associated to this architecture, and gives results for an exemplary prototype.
This prototype, called multiplexing fuzzy controller (MFCON), has been realized in a CMOS 0.7 um standard technology. It has
two inputs, implements 64 rules, and features 500 ns of input to output delay with 16-mW of power consumption. Results from the chip in a control application with a dc motor are also provided
Neuro-fuzzy chip to handle complex tasks with analog performance
This Paper presents a mixed-signal neuro-fuzzy controller chip which, in terms of
power consumption, input-output delay and precision performs as a fully analog
implementation. However, it has much larger complexity than its purely analog
counterparts. This combination of performance and complexity is achieved through
the use of a mixed-signal architecture consisting of a programmable analog core of
reduced complexity, and a strategy, and the associated mixed-signal circuitry, to
cover the whole input space through the dynamic programming of this core [1].
Since errors and delays are proportional to the reduced number of fuzzy rules
included in the analog core, they are much smaller than in the case where the whole
rule set is implemented by analog circuitry. Also, the area and the power
consumption of the new architecture are smaller than those of its purely analog
counterparts simply because most rules are implemented through programming.
The Paper presents a set of building blocks associated to this architecture, and gives
results for an exemplary prototype. This prototype, called MFCON, has been
realized in a CMOS 0.7μm standard technology. It has two inputs, implements 64
rules and features 500ns of input to output delay with 16mW of power consumption.
Results from the chip in a control application with a DC motor are also provided
Integrated circuit implementation of fuzzy controllers
This paper presents mixed-signal current-mode CMOS circuits to implement programmable
fuzzy controllers that perform the singleton or zero-order Sugeno’s method. Design equations to
characterize these circuits are provided to explain the precision and speed that they offer. This analysis
is illustrated with the experimental results of prototypes integrated in standard CMOS technologies.
These tests show that an equivalent precision of 6 bits is achieved. The connection of
these blocks according to a proposed architecture allows fuzzy chips with low silicon area whose
inference speed is in the range of 2 Mega FLIPS (fuzzy logic inferences per second
A modular CMOS analog fuzzy controller
The low/medium precision required for many fuzzy applications makes analog circuits natural candidates to design fuzzy chips with optimum speed/power figures. This paper presents a sixteen rules-two inputs analog fuzzy controller in a CMOS 1 /spl mu/m single-poly technology based on building blocks implementations previously proposed by the authors (1995). However, such building blocks are rearranged here to get a highly modular architecture organized from two high level blocks: the label block and the rule block. In addition, sharing of membership function circuits allows a compact design with low area and power consumption and its highly modular architecture will permit to increase the number of inputs and rules in future chips with hardly design effort. The paper includes measurements from a silicon prototype of the controller
Building blocks for current-mode implementation of VLSI fuzzy microcontrollers
A fuzzy microcontroller is presented implementing a simplified inference mechanism. Fuzzification, rule composition and defuzzification are carried out by means of (basically) analog current-mode CMOS circuits operating in strong inversion. Also a voltage interface is provided with the external world. Combining analog and digital techniques allow a programming capability
Current-mode singleton fuzzy controller
This paper describes the realization of a fuzzy controller which implements the simplified inference mechanism. CMOS analog circuits where signals are represented as currents are employed. However, the whole system is externally communicated through voltages, thus enabling simple interface with conventional control circuitry
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