9,686 research outputs found

    Synchronization of a WDM Packet-Switched Slotted Ring

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    In this paper, we present two different strategies of slot synchronization in wavelength-division-multiplexing (WDM) packet-switched slotted-ring networks. Emphasis is given to the architecture behind the WDM Optical Network Demonstrator over Rings (WONDER) project, which is based on tunable transmitters and fixed receivers. The WONDER experimental prototype is currently being developed at the laboratories of Politecnico di Torino. In the former strategy, a slotsynchronization signal is transmitted by the master station on a dedicated control wavelength; in the latter, slave nodes achieve slot synchronization aligning on data packets that are received from the master. The performance of both synchronization strategies, particularly in terms of packet-collision probability, was evaluated by simulation. The technique based on transmitting a timing signal on a dedicated control wavelength achieves better performance, although it is more expensive due to the need for an additional wavelength. However, the technique based on aligning data packets that are received from the master, despite attaining lower timing stability, still deserves further study, particularly if limiting the number of wavelengths and receivers is a major requirement. Some experimental results, which were measured on the WONDER prototype, are also shown. Measurement results, together with theoretical findings, demonstrate the good synchronization performance of the prototype

    Fast synchronization 3R burst-mode receivers for passive optical networks

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    This paper gives a tutorial overview on high speed burst-mode receiver (BM-RX) requirements, specific for time division multiplexing passive optical networks, and design issues of such BM-RXs as well as their advanced design techniques. It focuses on how to design BM-RXs with short burst overhead for fast synchronization. We present design principles and circuit architectures of various types of burst-mode transimpedance amplifiers, burst-mode limiting amplifiers and burst-mode clock and data recovery circuits. The recent development of 10 Gb/s BM-RXs is highlighted also including dual-rate operation for coexistence with deployed PONs and on-chip auto reset generation to eliminate external timing-critical control signals provided by a PON medium access control. Finally sub-system integration and state-of-the-art system performance for 10 Gb/s PONs are reviewed
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