Observation of chaotic beats in a driven memristive Chua's circuit

In this paper, a time varying resistive circuit realising the action of an active three segment piecewise linear flux controlled memristor is proposed. Using this as the nonlinearity, a driven Chua's circuit is implemented. The phenomenon of chaotic beats in this circuit is observed for a suitable choice of parameters. The memristor acts as a chaotically time varying resistor (CTVR), switching between a less conductive OFF state and a more conductive ON state. This chaotic switching is governed by the dynamics of the driven Chua's circuit of which the memristor is an integral part. The occurrence of beats is essentially due to the interaction of the memristor aided self oscillations of the circuit and the external driving sinusoidal forcing. Upon slight tuning/detuning of the frequencies of the memristor switching and that of the external force, constructive and destructive interferences occur leading to revivals and collapses in amplitudes of the circuit variables, which we refer as chaotic beats. Numerical simulations and Multisim modelling as well as statistical analyses have been carried out to observe as well as to understand and verify the mechanism leading to chaotic beats.Comment: 30 pages, 16 figures; Submitted to IJB

Adaptive Detection of Instabilities: An Experimental Feasibility Study

We present an example of the practical implementation of a protocol for experimental bifurcation detection based on on-line identification and feedback control ideas. The idea is to couple the experiment with an on-line computer-assisted identification/feedback protocol so that the closed-loop system will converge to the open-loop bifurcation points. We demonstrate the applicability of this instability detection method by real-time, computer-assisted detection of period doubling bifurcations of an electronic circuit; the circuit implements an analog realization of the Roessler system. The method succeeds in locating the bifurcation points even in the presence of modest experimental uncertainties, noise and limited resolution. The results presented here include bifurcation detection experiments that rely on measurements of a single state variable and delay-based phase space reconstruction, as well as an example of tracing entire segments of a codimension-1 bifurcation boundary in two parameter space.Comment: 29 pages, Latex 2.09, 10 figures in encapsulated postscript format (eps), need psfig macro to include them. Submitted to Physica

CMOS current-mode chaotic neurons

This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks, and another circuit to realize programmable current-mode synapse using CMOS-compatible BJT's. They have been fabricated in a double-metal, single-poly 1.6 /spl mu/m CMOS technology and their measured performance reached the expected function and specifications. The neuron soma circuits use a novel, highly accurate CMOS circuit strategy to realize piecewise-linear characteristics in the current-mode domain. Their prototypes obtain reduced area and low voltage power supply (down to 3 V) with clock frequency of 500 kHz. As regard to the synapse circuit, it obtains large linearity and continuous, linear, weight adjustment by exploration of the exponential-law operation of CMOS-BJT's. The full accordance observed between theory and measurements supports the development of future analog VLSI chaotic neural networks to emulate biological systems and advanced computation

Simple Floating Voltage-Controlled Memductor Emulator for Analog Applications

The topic of memristive circuits is a novel topic in circuit theory that has become of great importance due to its unique behavior which is useful in different applications. But since there is a lack of memristor samples, a memristor emulator is used instead of a solid state memristor. In this paper, a new simple floating voltage-controlled memductor emulator is introduced which is implemented using commercial off the shelf (COTS) realization. The mathematical modeling of the proposed circuit is derived to match the theoretical model. The proposed circuit is tested experimentally using different excitation signals such as sinusoidal, square, and triangular waves showing an excellent matching with previously reported simulations

Integrated chaos generators

This paper surveys the different design issues, from mathematical model to silicon, involved on the design of integrated circuits for the generation of chaotic behavior.Comisión Interministerial de Ciencia y Tecnología 1FD97-1611(TIC)European Commission ESPRIT 3110