Advancing Hardware Security Using Polymorphic and Stochastic Spin-Hall Effect Devices

Protecting intellectual property (IP) in electronic circuits has become a serious challenge in recent years. Logic locking/encryption and layout camouflaging are two prominent techniques for IP protection. Most existing approaches, however, particularly those focused on CMOS integration, incur excessive design overheads resulting from their need for additional circuit structures or device-level modifications. This work leverages the innate polymorphism of an emerging spin-based device, called the giant spin-Hall effect (GSHE) switch, to simultaneously enable locking and camouflaging within a single instance. Using the GSHE switch, we propose a powerful primitive that enables cloaking all the 16 Boolean functions possible for two inputs. We conduct a comprehensive study using state-of-the-art Boolean satisfiability (SAT) attacks to demonstrate the superior resilience of the proposed primitive in comparison to several others in the literature. While we tailor the primitive for deterministic computation, it can readily support stochastic computation; we argue that stochastic behavior can break most, if not all, existing SAT attacks. Finally, we discuss the resilience of the primitive against various side-channel attacks as well as invasive monitoring at runtime, which are arguably even more concerning threats than SAT attacks.Comment: Published in Proc. Design, Automation and Test in Europe (DATE) 201

Secure Scan Design with a Novel Methodology of Scan Camouflaging

Scan based attacks are the major security concerns of a design. These attacks are majorly employed to understand the camouflaged logic during reverse engineering. The state-of-the-art techniques like scan chain scrambling hinder accessibility of scan chains, but are prone to layout level reverse engineering attacks. In the proposed methodology, the scan design is secured by adding an extra scan input port (DSI) to the flipflop using dummy contacts, which ensure that DSI cannot be distinguished from SI port even with layout based reverse engineering techniques. Dummy scan chain connections are introduced in the design by connecting DSI port to the nearby flipflop Q output port. Our proposed method can withstand Reset-and-scan attack, Incremental SAT-based attack and the recent ScanSAT attack. The performance of this concept is measured in terms of frequency and total power consumption on IWLS-2005 benchmark circuits having up to 1380 flipflops with 40nm technology library. The delay is effected by a maximum of 2.2% with 50% obfuscation without any impact on power, pattern generation time and scan test time

ToSHI - Towards Secure Heterogeneous Integration: Security Risks, Threat Assessment, and Assurance

The semiconductor industry is entering a new age in which device scaling and cost reduction will no longer follow the decades-long pattern. Packing more transistors on a monolithic IC at each node becomes more difficult and expensive. Companies in the semiconductor industry are increasingly seeking technological solutions to close the gap and enhance cost-performance while providing more functionality through integration. Putting all of the operations on a single chip (known as a system on a chip, or SoC) presents several issues, including increased prices and greater design complexity. Heterogeneous integration (HI), which uses advanced packaging technology to merge components that might be designed and manufactured independently using the best process technology, is an attractive alternative. However, although the industry is motivated to move towards HI, many design and security challenges must be addressed. This paper presents a three-tier security approach for secure heterogeneous integration by investigating supply chain security risks, threats, and vulnerabilities at the chiplet, interposer, and system-in-package levels. Furthermore, various possible trust validation methods and attack mitigation were proposed for every level of heterogeneous integration. Finally, we shared our vision as a roadmap toward developing security solutions for a secure heterogeneous integration

Optimizing energy-efficiency for multi-core packet processing systems in a compiler framework

Network applications become increasingly computation-intensive and the amount of traffic soars unprecedentedly nowadays. Multi-core and multi-threaded techniques are thus widely employed in packet processing system to meet the changing requirement. However, the processing power cannot be fully utilized without a suitable programming environment. The compilation procedure is decisive for the quality of the code. It can largely determine the overall system performance in terms of packet throughput, individual packet latency, core utilization and energy efficiency. The thesis investigated compilation issues in networking domain first, particularly on energy consumption. And as a cornerstone for any compiler optimizations, a code analysis module for collecting program dependency is presented and incorporated into a compiler framework. With that dependency information, a strategy based on graph bi-partitioning and mapping is proposed to search for an optimal configuration in a parallel-pipeline fashion. The energy-aware extension is specifically effective in enhancing the energy-efficiency of the whole system. Finally, a generic evaluation framework for simulating the performance and energy consumption of a packet processing system is given. It accepts flexible architectural configuration and is capable of performingarbitrary code mapping. The simulation time is extremely short compared to full-fledged simulators. A set of our optimization results is gathered using the framework

Liquid Metal Printing with Scanning Probe Lithography for Printed Electronics

In den letzten Jahren hat das „Internet der Dinge“ (Englisch Internet of Things, abgekürzt IoT), das auch als Internet of Everything (Deutsch frei „Internet von Allem“) bezeichnet wird, mit dem Aufkommen der „Industrie 4.0“ einen Strom innovativer und intelligenter sensorgestützter Elektronik der neuen Generation in den Alltag gebracht. Dies erfordert auch die Herstellung einer riesigen Anzahl von elektronischen Bauteilen, einschließlich Sensoren, Aktoren und anderen Komponenten. Gleichzeitig ist die herkömmliche Elektronikfertigung zu einem hochkomplexen und investitionsintensiven Prozess geworden. In dem Maße, wie die Zahl der elektronischen Bauteile und die Nachfrage nach neuen, fortschrittlicheren elektronischen Bauteilen zunimmt, steigt auch die Notwendigkeit, effizientere und nachhaltigere Wege zur Herstellung dieser Bauteile zu finden. Die gedruckte Elektronik ist ein wachsender Markt, der diese Nachfrage befriedigen und die Zukunft der Herstellung von elektronischen Geräten neu gestalten könnte. Sie erlaubt eine einfache und kostengünstige Produktion und ermöglicht die Herstellung von Geräten auf Papier- oder Kunststoffsubstraten. Für die Herstellung gibt es dabei eine Vielzahl von Methoden. Techniken auf der Grundlage der Rastersondenlithografie waren dabei schon immer Teil der gedruckten Elektronik und haben zu Innovationen in diesem Bereich geführt. Obwohl die Technologie noch jung ist und der derzeitige Stand der gedruckten Elektronik im industriellen Maßstab, wie z. B. die Herstellung kompletter integrierter Schaltkreise, stark limitiert ist, sind die potenziellen Anwendungen enorm. Im Mittelpunkt der Entwicklung gedruckter elektronischer Schaltungen steht der Druck leitfähiger und anderer funktionaler Materialien. Die meisten der derzeit verfügbaren Arbeiten haben sich dabei auf die Verwendung von Tinten auf Nanopartikelbasis konzentriert. Die Herstellungsschritte auf der Grundlage von Tinten auf Nanopartikelbasis sind komplizierte Prozesse, da sie das Ausglühen (Englisch Annealing) und weitere Nachbearbeitungsschritte umfassen, um die gedruckten Muster leitfähig zu machen. Die Verwendung von Gallium-basierten, bei/nahe Raumtemperatur flüssigen Metallen und deren direktes Schreiben für vollständig gedruckte Elektronik ist immer noch ungewöhnlich, da die Kombination aus dem Vorhandensein einer Oxidschicht, hohen Oberflächenspannungen und Viskosität ihre Handhabung erschwert. Zu diesem Zweck zielt diese Arbeit darauf ab, Methoden zum Drucken von Materialien, einschließlich Flüssigmetallen, zu entwickeln, die mit den verfügbaren Druckmethoden nicht oder nur schwer gedruckt werden können und diese Methoden zur Herstellung vollständig gedruckter elektronischer Bauteile zu verwenden. Weiter werden Lösungen für Probleme während des Druckprozesses untersucht, wie z. B. die Haftung der Tinte auf dem Substrat und andere abscheidungsrelevante Aspekte. Es wird auch versucht, wissenschaftliche Fragen zur Stabilität von gedruckten elektronischen Bauelementen auf Flüssigmetallbasis zu beantworten. Im Rahmen der vorliegenden Arbeit wurde eine auf Glaskapillaren basierenden Direktschreibmethode für das Drucken von Flüssigmetallen, hier Galinstan, entwickelt. Die Methode wurde auf zwei unterschiedlichen Wegen implementiert: Einmal in einer „Hochleistungsversion“, basierend auf einem angepassten Nanolithographiegerät, aber ebenfalls in einer hochflexiblen, auf Mikromanipulatoren basierenden Version. Dieser Aufbau erlaubt einen on-the-fly („im Fluge“) kapillarbasierten Druck auf einer breiten Palette von Geometrien, wie am Beispiel von vertikalen, vertieften Oberflächen sowie gestapelten 3D-Gerüsten als schwer zugängliche Oberflächen gezeigt wird. Die Arbeit erkundet den potenziellen Einsatz dieser Methode für die Herstellung von vollständig gedruckten durch Flüssigmetall ermöglichten Bauteilen, einschließlich Widerständen, Mikroheizer, p-n-Dioden und Feldeffekttransistoren. Alle diese elektronischen Bauelemente werden ausführlich charakterisiert. Die hergestellten Mikroheizerstrukturen werden für temperaturgeschaltete Mikroventile eingesetzt, um den Flüssigkeitsstrom in einem Mikrokanal zu kontrollieren. Diese Demonstration und die einfache Herstellung zeigt, dass das Konzept auch auf andere Anwendungen, wie z.B. die bedarfsgerechte Herstellung von Mikroheizern für in-situ Rasterelektronenmikroskop-Experimente, ausgeweitet werden kann. Darüber hinaus zeigt diese Arbeit, wie PMMA-Verkapselung als effektive Barriere gegen Sauerstoff und Feuchtigkeit fungiert und zusätzlich als brauchbarer mechanischer Schutz der auf Flüssigmetall basierenden gedruckten elektronischen Bauteile wirken kann. Insgesamt zeigen der alleinstehende, integrierte Herstellungsablauf und die Funktionalität der Geräte, dass das Potenzial des Flüssigmetall-Drucks in der gedruckten Elektronik viel größer ist als einzig die Verwendung zur Verbindung konventioneller elektronischer Bauteile. Neben der Entwicklung von Druckverfahren und der Herstellung elektronischer Bauteile befasst sich die Arbeit auch mit der Korrosion und der zusätzlichen Legierung von konventionellen Metallelektroden in Kontakt mit Flüssigmetallen, welche die Stabilität der Bauteil beinträchtigen könnten. Zu diesem Zweck wurde eine korrelierte Materialinteraktionsstudie von gedruckten Galinstan- und Goldelektroden durchgeführt. Durch die kombinierte Anwendung von optischer Mikroskopie, vertikaler Rasterinterferometrie, Rasterelektronenmikroskopie, Röntgenphotonenspektroskopie und Rasterkraftmikroskopie konnte der Ausbreitungsprozess von Flüssigmetalllinien auf Goldfilmen eingehend charakterisiert werden. Diese Studie zeigt eine unterschiedliche Ausbreitung der verschiedenen Komponenten des Flüssigmetalls sowie die Bildung von intermetallischen Nanostrukturen auf der umgebenden Goldfilmoberfläche. Auf der Grundlage der erhaltenen zeitabhängigen, korrelierten Charakterisierungsergebnisse wird ein Modell für den Ausbreitungsprozess vorgeschlagen, das auf dem Eindringen des Flüssigmetalls in den Goldfilm basiert. Um eine ergänzende Perspektive auf die interne Nanostruktur zu erhalten, wurde die Röntgen-Nanotomographie eingesetzt, um die Verteilung von Gold, Galinstan und intermetallischen Phasen in einem in das Flüssigmetall getauchten Golddraht zu untersuchen. Schlussendlich werden Langzeitmessungen des Widerstands an Flüssigmetallleitungen, die Goldelektroden verbinden, durchgeführt, was dazu beiträgt, die Auswirkungen von Materialwechselwirkungen auf elektronische Anwendungen zu bewerten

Design of Hardware with Quantifiable Security against Reverse Engineering

Semiconductors are a 412 billion dollar industry and integrated circuits take on important roles in human life, from everyday use in smart-devices to critical applications like healthcare and aviation. Saving today\u27s hardware systems from attackers can be a huge concern considering the budget spent on designing these chips and the sensitive information they may contain. In particular, after fabrication, the chip can be subject to a malicious reverse engineer that tries to invasively figure out the function of the chip or other sensitive data. Subsequent to an attack, a system can be subject to cloning, counterfeiting, or IP theft. This dissertation addresses some issues concerning the security of hardware systems in such scenarios. First, the issue of privacy risks from approximate computing is investigated in Chapter 2. Simulation experiments show that the erroneous outputs produced on each chip instance can reveal the identity of the chip that performed the computation, which jeopardizes user privacy. The next two chapters deal with camouflaging, which is a technique to prevent reverse engineering from extracting circuit information from the layout. Chapter 3 provides a design automation method to protect camouflaged circuits against an adversary with prior knowledge about the circuit\u27s viable functions. Chapter 4 provides a method to reverse engineer camouflaged circuits. The proposed reverse engineering formulation uses Boolean Satisfiability (SAT) solving in a way that incorporates laser fault injection and laser voltage probing capabilities to figure out the function of an aggressively camouflaged circuit with unknown gate functions and connections. Chapter 5 addresses the challenge of secure key storage in hardware by proposing a new key storage method that applies threshold-defined behavior of memory cells to store secret information in a way that achieves a high degree of protection against invasive reverse engineering. This approach requires foundry support to encode the secrets as threshold voltage offsets in transistors. In Chapter 6, a secret key storage approach is introduced that does not rely on a trusted foundry. This approach only relies on the foundry to fabricate the hardware infrastructure for key generation but not to encode the secret key. The key is programmed by the IP integrator or the user after fabrication via directed accelerated aging of transistors. Additionally, this chapter presents the design of a working hardware prototype on PCB that demonstrates this scheme. Finally, chapter 7 concludes the dissertation and summarizes possible future research

HyperCell: A Bio-inspired Design Framework for Real-time Interactive Architectures

This pioneering research focuses on Biomimetic Interactive Architecture using “Computationâ€, “Embodimentâ€, and “Biology†to generate an intimate embodied convergence to propose a novel rule-based design framework for creating organic architectures composed of swarm-based intelligent components. Furthermore, the research boldly claims that Interactive Architecture should emerge as the next truly Organic Architecture. As the world and society are dynamically changing, especially in this digital era, the research dares to challenge the Utilitas, Firmitas, and Venustas of the traditional architectural Weltanschauung, and rejects them by adopting the novel notion that architecture should be dynamic, fluid, and interactive. This project reflects a trajectory from the 1960’s with the advent of the avant-garde architectural design group, Archigram, and its numerous intriguing and pioneering visionary projects. Archigram’s non-standard, mobile, and interactive projects profoundly influenced a new generation of architects to explore the connection between technology and their architectural projects. This research continues this trend of exploring novel design thinking and the framework of Interactive Architecture by discovering the interrelationship amongst three major topics: “Computationâ€, “Embodimentâ€, and “Biologyâ€. The project aims to elucidate pioneering research combining these three topics in one discourse: “Bio-inspired digital architectural designâ€. These three major topics will be introduced in this Summary. “Computationâ€, is any type of calculation that includes both arithmetical and nonarithmetical steps and follows a well-defined model understood and described as, for example, an algorithm. But, in this research, refers to the use of data storage, parametric design application, and physical computing for developing informed architectural designs. “Form†has always been the most critical focus in architectural design, and this focus has also been a major driver behind the application computational design in Architecture. Nonetheless, this research will interpret the term “Form†in architecture as a continual “information processor†rather than the result of information processing. In other words, “Form†should not be perceived only as an expressive appearance based computational outcome but rather as a real-time process of information processing, akin to organic “Formationâ€. Architecture embodying kinetic ability for adjusting or changing its shape with the ability to process the surroundings and feedback in accordance with its free will with an inherent interactive intelligent movement of a living body. Additionally, it is also crucial to address the question of whether computational technologies are being properly harnessed, if they are only used for form-generating purposes in architecture design, or should this be replaced with real-time information communication and control systems to produce interactive architectures, with embodied computation abilities? “Embodiment†in the context of this research is embedded in Umberto Eco’s vision on Semiotics, theories underlying media studies in Marshall McLuhan’s “Body Extension†(McLuhan, 1964), the contemporary philosophical thought of “Body Without Organs†(Gilles Deleuze and Félix Guattari, 1983), the computational Logic of ‘Swarm Behavior’ and the philosophical notion of “Monadology†proposed by Gottfried Leibniz (Leibniz, 1714). Embodied computation and design are predominant today within the wearable computing and smart living domains, which combine Virtual and Real worlds. Technical progress and prowess in VR development also contribute to advancing 3D smart architectural design and display solutions. The proposed ‘Organic body-like architectural spaces’ emphasize upon the realization of a body-like interactive space. Developing Interactive Architecture will imply eliciting the collective intelligence prevalent in nature and the virtual world of Big Data. Interactive Architecture shall thus embody integrated Information exchange protocols and decision-making systems in order to possess organic body-like qualities. “Biologyâ€, in this research explores biomimetic principles intended to create purposedriven kinetic and organic architecture. This involves a detailed study/critique of organic architecture, generating organic shapes, performance optimization based digital fabrication techniques and kinetic systems. A holistic bio-inspired architecture embodies multiple performance criteria akin to natural systems, which integrate structural, infrastructure performances throughout the growth of an organic body. Such a natural morphogenesis process of architectural design explores what Janine M. Benyus described as “learning the natural processâ€. Profoundly influenced by the processes behind morphogenesis, the research further explores Evolutionary Development Biology (Evo-Devo) explaining how embryological regulation strongly affect the resulting formations. Evo-Devo in interactive architecture implies the development of architecture based on three fundamental principles: “Simple to Complexâ€, “Geometric Information Distributionâ€, and “On/Off Switch and Trigger.†The research seeks to create a relatively intelligent architectural body, and the tactile interactive spatial environment by applying the extracted knowledge from the study of the aforementioned principles of Evo-Devo in the following fashion: A. Extract a Self-Similar Componential Systembased approach from the “Simple to Complex†principle of Evo-Devo B. Extract the idea of “Collective Intelligence†from “Geometric information Distribution†principle of Evo-Devo C. Extract the principle of “Assembly Regulation†from “On/Off switch and trigger†principle of Evo-Devo The “HyperCell†research, through an elaborate investigation on the three aforementioned topics, develops a design framework for developing real-time adaptive spatial systems. HyperCell does this, by developing a system of transformable cubic elements which can self-organize, adapt and interact in real-time. These Hypercells shall comprise an organic space which can adjust itself in relation to our human bodies. The furniture system is literally reified and embodied to develop an intra-active space that proactively provokes human movement. The space thus acquires an emotive dimension and can become your pet, partner, or even friend, and might also involve multiple usabilities of the same space. The research and its progression were also had actively connected with a 5-year collaborative European Culture project: “MetaBodyâ€. The research thus involves exploration of Interactive Architecture from the following perspectives: architectural design, digital architectural history trajectory, computational technology, philosophical discourse related to the embodiment, media and digital culture, current VR and body-related technology, and Evolutionary Developmental Biology. “HyperCell†will encourage young architects to pursue interdisciplinary design initiatives via the fusion of computational design, embodiment, and biology for developing bio-inspired organic architectures