Integrated Lithographic Molding for Microneedle-Based Devices

This paper presents a new fabrication method consisting of lithographically defining multiple layers of high aspect-ratio photoresist onto preprocessed silicon substrates and release of the polymer by the lost mold or sacrificial layer technique, coined by us as lithographic molding. The process methodology was demonstrated fabricating out-of-plane polymeric hollow microneedles. First, the fabrication of needle tips was demonstrated for polymeric microneedles with an outer diameter of 250 mum, through-hole capillaries of 75-mum diameter and a needle shaft length of 430 mum by lithographic processing of SU-8 onto simple v-grooves. Second, the technique was extended to gain more freedom in tip shape design, needle shaft length and use of filling materials. A novel combination of silicon dry and wet etching is introduced that allows highly accurate and repetitive lithographic molding of a complex shape. Both techniques consent to the lithographic integration of microfluidic back plates forming a patch-type device. These microneedle-integrated patches offer a feasible solution for medical applications that demand an easy to use point-of-care sample collector, for example, in blood diagnostics for lithium therapy. Although microchip capillary electrophoresis glass devices were addressed earlier, here, we show for the first time the complete diagnostic method based on microneedles made from SU-8

A Dry Etch Approach To Reduce Roughness And Eliminate Visible Grind Marks In Silicon Wafers Post Back-grind

3D wafer packaging represents a significant component of the total wafer level processing cost. Replacement of the Chemical Mechanical Polishing (CMP) process step with a corresponding dry etch can yield significant time and cost savings. Incorporating equipment already utilized in the 3D integrated wafer packaging process during the subsequent Through Silicon Via (TSV) reveal step, process efficiencies can be achieved, with overall die yields being maintained. Using dry etch technology to treat a 200nm rough back-ground silicon surface, a smooth surface with a peak to valley roughness of less than 6nm is demonstrated. This patented process differs from other dry etch smoothing techniques in that it aims to eliminate any visual grind marks rather than just reducing the surface roughness. The elimination of visible grind marks is critical in later optical inspection where they are falsely identified as defects. The quality of the surface is equivalent to that of a CMP processed wafer and as such, this process has been implemented in manufacturing replacing the CMP step. The novel process described combines a surface modification followed by a roughness reduction in an iterative manner to produce a smooth surface without visible grind marks post processing

Packaging for a drug delivery microelectromechanical system

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2005.Includes bibliographical references (p. 52-55).Local drug delivery is a fast expanding field, and has been a center of attention for researchers in medicine in the last decade. Its advantages over systemic drug delivery are clear in cancer therapy, with localized tumors. A silicon microelectromechanical drug delivery device was fabricated for the purpose of delivering chemotherapeutic agents such-as carmustine, a potent brain cancer drug, directly to the site of the tumor. Limitations in the delivery capacity of the device led to the design of a new package. This package is made from thermally bonded Pyrex® 7740 frames that are anodically bonded to the drug delivery chip. It increases the capacity of the chip, is smaller than the previous package and possesses true hermeticity, because of the bonding processes involved. This work describes the fabrication steps of the new package and a problem with the thermal bonding of Pyrex® frames preventing the achievement of a package true to the original design. A temporary solution was devised and the completed package was tested with regards to its intended goals. It managed to increase the load capacity of the chip by a, factor of 10, with potential for more, while decreasing the overall size of the package. Short-term hermeticity was achieved for this package by using a UV-cured epoxy to bond some pieces, which was not in the original design. Future work will focus on finding a permanent solution to the aforementioned problem, and directions for it were suggested.by Hong Linh Ho Duc.S.M

MS

thesisPolymeric materials are widely used in manufacturing of microfluidic devices, and polydimethylsiloxane (PDMS) is a commonly used polymeric material in research laboratories due to its potential for rapid prototyping. However, PDMS is less desirable for mass production applications as it requires considerable processing time. With the development of micro/nano imprinting techniques, microfluidic structures can also be rapidly imprinted on other polymers such as Poly(methyl methacrylate) (PMMA) and polycarbonate using molding technologies. Even though PMMA is the material of preference for our application-a nanoporous membrane-based RNA extraction system-a PDMS membrane is an integral part for the functioning of pneumatically actuated valves and pumps. Since there is no well-established method that exists for bonding PDMS to PMMA, an attempt has been made in this thesis to increase the functionality of PMMA microfluidic parts. The work can be classified into two main categories: manufacturing of hot embossed plastic parts and development of bonding technology for PDMS and PMMA. To prepare the PMMA parts, a hot embossing template of brass is designed and manufactured for imprinting the microfluidic parts. Functional silanes such as Amino-Propyl-Tri-Ethoxy- Silane and Bis-Tri-Methoxy-Silyl-Propyl-Amine are used to obtain an irreversible chemical bond between PMMA and PDMS, which cannot be achieved effectively with existing bonding practices such as glow discharge and thin layer PDMS adhesive

Fabrication, bonding, assembly, and testing of metal-based microchannel devices

Microsystem technologies are believed to be an important part of the contemporary technological foundation and are becoming a commercially significant specialty area in manufacturing. The design and fabrication of microscale engineering structures has the potential of generating revolutionary changes in many products over a wide range of industrial sectors. Metal-based microchannel heat exchangers (MHEs) promise high heat transfer coefficients together with mechanical robustness, and are of interest for a wide range of applications. Fabrication technologies capable of creating high-aspect-ratio microscale structures (HARMSs) in metals such as Cu at low cost and high throughput are of particular interest. Likewise, simple and reliable bonding and assembly techniques are critical for building functional metal-based microfluidic devices. This dissertation focuses on various aspects of fabrication, bonding, assembly, and testing of metal-based microdevices. In chapter 1, existing techniques for fabricating metal-based HARMSs are reviewed briefly and compared with each other. A new technique for fabricating metal-based HARMSs, high temperature compression molding, is introduced. Two related issues, bonding and assembly of metal-based HARMSs and testing of assembled metal-based microdevices are discussed respectively. In chapters 2-6, Cu- and Al- based HARMSs were successfully bonded using Al or Sn thin foil intermediate layers and co-deposited Al-Ge thin film intermediate layers, respectively. Quantitative evaluation of bond strengths was carried out as a function of various bonding parameters. Tensile bond strengths are shown to be ~30MPa for bonded Cu pieces and to exceed 75MPa, reaching as high as 165MPa, for boned Al pieces. Detailed characterizations of the micro-/nano- scale structure of buried bonding interfaces were conducted to rationalize results of mechanical testing. Chapters 7&8 talk about systematic experimentation of fabrication, bonding, and testing of Cu- and Al- based MHEs, and detailed results and discussion on flow and heat transfer performance of these MHEs under two different testing configurations, constant heat flux and constant wall temperature. The results show the increase of surface roughness in the replicated microchannels can cause significant improvements to microchannel heat exchanger performance. Finally, chapter 9 summarizes this dissertation research with main results and achievements. Future work is also discussed in this chapter

Size Dependence of Nanoscale Wear of Silicon Carbide

Nanoscale, single-asperity wear of single-crystal silicon carbide (sc-SiC) and nanocrystalline silicon carbide (nc-SiC) is investigated using single-crystal diamond nanoindenter tips and nanocrystalline diamond atomic force microscopy (AFM) tips under dry conditions, and the wear behavior is compared to that of single-crystal silicon with both thin and thick native oxide layers. We discovered a transition in the relative wear resistance of the SiC samples compared to that of Si as a function of contact size. With larger nanoindenter tips (tip radius around 370 nm), the wear resistances of both sc-SiC and nc-SiC are higher than that of Si. This result is expected from the Archard's equation because SiC is harder than Si. However, with the smaller AFM tips (tip radius around 20 nm), the wear resistances of sc-SiC and nc-SiC are lower than that of Si, despite the fact that the contact pressures are comparable to those applied with the nanoindenter tips, and the plastic zones are well-developed in both sets of wear experiments. We attribute the decrease in the relative wear resistance of SiC compared to that of Si to a transition from a wear regime dominated by the materials' resistance to plastic deformation (i.e., hardness) to a regime dominated by the materials' resistance to interfacial shear. This conclusion is supported by our AFM studies of wearless friction, which reveal that the interfacial shear strength of SiC is higher than that of Si. The contributions of surface roughness and surface chemistry to differences in interfacial shear strength are also discussed

Integration of Bulk Piezoelectric Materials into Microsystems.

Bulk piezoelectric ceramics, compared to deposited piezoelectric thin-films, provide greater electromechanical coupling and charge capacity, which are highly desirable in many MEMS applications. In this thesis, a technology platform is developed for wafer-level integration of bulk piezoelectric substrates on silicon, with a final film thickness of 5-100μm. The characterized processes include reliable low-temperature (200˚C) AuIn diffusion bonding and parylene bonding of bulk-PZT on silicon, wafer-level lapping of bulk-PZT with high-uniformity (±0.5μm), and low-damage micro-machining of PZT films via dicing-saw patterning, laser ablation, and wet-etching. Preservation of ferroelectric and piezoelectric properties is confirmed with hysteresis and piezo-response measurements. The introduced technology offers higher material quality and unique advantages in fabrication flexibility over existing piezoelectric film deposition methods. In order to confirm the preserved bulk properties in the final film, diaphragm and cantilever beam actuators operating in the transverse-mode are designed, fabricated and tested. The diaphragm structure and electrode shapes/sizes are optimized for maximum deflection through finite-element simulations. During tests of fabricated devices, greater than 12μmPP displacement is obtained by actuation of a 1mm2 diaphragm at 111kHz with <7mW power consumption. The close match between test data and simulation results suggests that the piezoelectric properties of bulk-PZT5A are mostly preserved without any necessity of repolarization. Three generations of resonant vibration energy harvesters are designed, simulated and fabricated to demonstrate the competitive performance of the new fabrication process over traditional piezoelectric deposition systems. An unpackaged PZT/Si unimorph harvester with 27mm3 active device volume produces up to 205μW at 1.5g/154Hz. The prototypes have achieved the highest figure-of-merits (normalized-power-density × bandwidth) amongst previously reported inertial energy harvesters. The fabricated energy harvester is utilized to create an autonomous energy generation platform in 0.3cm3 by system-level integration of a 50-80% efficient power management IC, which incorporates a supply-independent bias circuitry, an active diode for low-dropout rectification, a bias-flip system for higher efficiency, and a trickle battery charger. The overall system does not require a pre-charged battery, and has power consumption of <1μW in active-mode (measured) and <5pA in sleep-mode (simulated). Under 1g vibration at 155Hz, a 70mF ultra-capacitor is charged from 0V to 1.85V in 50 minutes.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/91479/1/aktakka_3.pdfhttp://deepblue.lib.umich.edu/bitstream/2027.42/91479/2/aktakka_2.pdfhttp://deepblue.lib.umich.edu/bitstream/2027.42/91479/3/aktakka_1.pd

真空紫外線を用いた先端機能性高分子材料の表面改質と接合

早大学位記番号:新7873早稲田大