37,918 research outputs found

    DeSyRe: on-Demand System Reliability

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    The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect and fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints

    PReMo : An Analyzer for P robabilistic Re cursive Mo dels

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    This paper describes PReMo, a tool for analyzing Recursive Markov Chains, and their controlled/game extensions: (1-exit) Recursive Markov Decision Processes and Recursive Simple Stochastic Games

    Software dependability techniques validated via fault injection experiments

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    The present paper proposes a C/C++ source-to-source compiler able to increase the dependability properties of a given application. The adopted strategy is based on two main techniques: variable duplication/triplication and control flow checking. The validation of these techniques is based on the emulation of fault appearance by software fault injection. The chosen test case is a client-server application in charge of calculating and drawing a Mandelbrot fracta

    Efficient design and evaluation of countermeasures against fault attacks using formal verification

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    This paper presents a formal verification framework and tool that evaluates the robustness of software countermeasures against fault-injection attacks. By modeling reference assembly code and its protected variant as automata, the framework can generate a set of equations for an SMT solver, the solutions of which represent possible attack paths. Using the tool we developed, we evaluated the robustness of state-of-the-art countermeasures against fault injection attacks. Based on insights gathered from this evaluation, we analyze any remaining weaknesses and propose applications of these countermeasures that are more robust

    Algorithmic Based Fault Tolerance Applied to High Performance Computing

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    We present a new approach to fault tolerance for High Performance Computing system. Our approach is based on a careful adaptation of the Algorithmic Based Fault Tolerance technique (Huang and Abraham, 1984) to the need of parallel distributed computation. We obtain a strongly scalable mechanism for fault tolerance. We can also detect and correct errors (bit-flip) on the fly of a computation. To assess the viability of our approach, we have developed a fault tolerant matrix-matrix multiplication subroutine and we propose some models to predict its running time. Our parallel fault-tolerant matrix-matrix multiplication scores 1.4 TFLOPS on 484 processors (cluster jacquard.nersc.gov) and returns a correct result while one process failure has happened. This represents 65% of the machine peak efficiency and less than 12% overhead with respect to the fastest failure-free implementation. We predict (and have observed) that, as we increase the processor count, the overhead of the fault tolerance drops significantly

    Ontology-based semantic interpretation of cylindricity specification in the next-generation GPS

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    Cylindricity specification is one of the most important geometrical specifications in geometrical product development. This specification can be referenced from the rules and examples in tolerance standards and technical handbooks in practice. These rules and examples are described in the form of natural language, which may cause ambiguities since different designers may have different understandings on a rule or an example. To address the ambiguous problem, a categorical data model of cylindricity specification in the next-generation Geometrical Product Specifications (GPS) was proposed at the University of Huddersfield. The modeling language used in the categorical data model is category language. Even though category language can develop a syntactically correct data model, it is difficult to interpret the semantics of the cylindricity specification explicitly. This paper proposes an ontology-based approach to interpret the semantics of cylindricity specification on the basis of the categorical data model. A scheme for translating the category language to the OWL 2 Web Ontology Language (OWL 2) is presented in this approach. Through such a scheme, the categorical data model is translated into a semantically enriched model, i.e. an OWL 2 ontology for cylindricity specification. This ontology can interpret the semantics of cylindricity specification explicitly. As the benefits of such semantic interpretation, consistency checking, inference procedures and semantic queries can be performed on the OWL 2 ontology. The proposed approach could be easily extended to support the semantic interpretations of other kinds of geometrical specifications
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