Intrinsic Charge Trapping in Amorphous Oxide Films: Status and Challenges

We review the current understanding of intrinsic electron and hole trapping in insulating amorphous oxide films on semiconductor and metal substrates. The experimental and theoretical evidences are provided for the existence of intrinsic deep electron and hole trap states caused by the disorder of amorphous metal oxide films. We start from presenting the results for amorphous (a) HfO<sub>2</sub>, chosen due to the availability of highest purity amorphous films, which is vital for studying their intrinsic electronic properties. Exhaustive photo-depopulation spectroscopy (EPDS) measurements and theoretical calculations using density functional theory (DFT) shed light on the atomic nature of electronic gap states responsible for deep electron trapping observed in a-HfO<sub>2</sub>. We review theoretical methods used for creating models of amorphous structures and electronic structure calculations of amorphous oxides and outline some of the challenges in modelling defects in amorphous materials. We then discuss theoretical models of electron polarons and bi-polarons in a-HfO<sub>2</sub> and demonstrate that these intrinsic states originate from low-coordinated ions and elongated metal-oxygen bonds in the amorphous oxide network. Similarly, holes can be captured at under-coordinated O sites. We then discuss electron and hole trapping in other amorphous oxides, such as a-SiO<sub>2</sub>, a-Al<sub>2</sub>O<sub>3</sub>, a-TiO<sub>2</sub>. We propose that the presence of low-coordinated ions in amorphous oxides with electron states of significant p and d character near the conduction band minimum (CBM) can lead to electron trapping and that deep hole trapping should be common to all amorphous oxides. Finally, we demonstrate that bi-electron trapping in a-HfO<sub>2</sub> and a-SiO<sub>2</sub> weakens Hf(Si)-O bonds and significantly reduces barriers for forming Frenkel defects, neutral O vacancies and O<sup>2-</sup> ions in these materials. These results should be useful for better understanding of electronic properties and structural evolution of thin amorphous films under carrier injection conditions

Trapping of hydrogen in Hf-based high κ dielectric thin films for advanced CMOS applications.

In recent years, advanced high κ gate dielectrics are under serious consideration to replace SiO2 and SiON in semiconductor industry. Hafnium-based dielectrics such as hafnium oxides, oxynitrides and Hf-based silicates/nitrided silicates are emerging as some of the most promising alternatives to SiO2/SiON gate dielectrics in complementary metal oxide semiconductor (CMOS) devices. Extensive efforts have been taken to understand the effects of hydrogen impurities in semiconductors and its behavior such as incorporation, diffusion, trapping and release with the aim of controlling and using it to optimize the performance of electronic device structures. In this dissertation, a systematic study of hydrogen trapping and the role of carbon impurities in various alternate gate dielectric candidates, HfO2/Si, HfxSi1-xO2/Si, HfON/Si and HfON(C)/Si is presented. It has been shown that processing of high κ dielectrics may lead to some crystallization issues. Rutherford backscattering spectroscopy (RBS) for measuring oxygen deficiencies, elastic recoil detection analysis (ERDA) for quantifying hydrogen and nuclear reaction analysis (NRA) for quantifying carbon, X-ray diffraction (XRD) for measuring degree of crystallinity and X-ray photoelectron spectroscopy (XPS) were used to characterize these thin dielectric materials. ERDA data are used to characterize the evolution of hydrogen during annealing in hydrogen ambient in combination with preprocessing in oxygen and nitrogen

Hf-based high-k materials for Si nanocrystal floating gate memories

Pure and Si-rich HfO2 layers fabricated by radio frequency sputtering were utilized as alternative tunnel oxide layers for high-k/Si-nanocrystals-SiO2/SiO2 memory structures. The effect of Si incorporation on the properties of Hf-based tunnel layer was investigated. The Si-rich SiO2 active layers were used as charge storage layers, and their properties were studied versus deposition conditions and annealing treatment. The capacitance-voltage measurements were performed to study the charge trapping characteristics of these structures. It was shown that with specific deposition conditions and annealing treatment, a large memory window of about 6.8 V is achievable at a sweeping voltage of ± 6 V, indicating the utility of these stack structures for low-operating-voltage nonvolatile memory devices

Electron trapping in ferroelectric HfO2

Charge trapping study at 300 and 77 K in ferroelectric (annealed Al- or Si-doped) and nonferroelectric (unannealed and/or undoped) HfO 2 films grown by atomic layer deposition reveals the presence of “deep” and “shallow” electron traps with volume concentrations in the 10 19 − cm − 3 range. The concentration of deep traps responsible for electron trapping at 300 K is virtually insensitive to the oxide doping by Al or Si but slightly decreases in films crystallized by high-temperature annealing in oxygen-free ambient. This behavior indicates that the trapping sites are intrinsic and probably related to disorder in HfO 2 rather than to the oxygen deficiency of the film. Electron injection at 77 K allowed us to fill shallow electron traps energetically distributed at ∼0.2 eV. These electrons are mobile and populate states with thermal ionization energies in the range ∼0.6–0.7 eV below the HfO 2 conduction band (CB). The trap energy depth and marginal sensitivity of their concentration to crystallization annealing or film doping with Si or Al suggests that these traps are associated with boundaries between crystalline grains and interfaces between crystalline and amorphous regions in HfO 2 films. This hypothesis is supported by density functional theory calculations of electron trapping at surfaces of monoclinic, tetragonal, and orthorhombic phases of HfO 2 . The calculated trap states are consistent with the observed thermal ionization (0.7–1.0 eV below the HfO 2 CB) and photoionization energies (in the range of 2.0–3.5 eV below the HfO 2 CB) and support their intrinsic polaronic nature

Effect of forming gas annealing on the degradation properties of Ge-based MOS stacks

The influence of forming gas annealing on the degradation at a constant stress voltage of multi-layered germanium-based Metal-Oxide-Semiconductor capacitors (p-Ge/GeOx/Al2O3/High-K/Metal Gate) has been analyzed in terms of the C-V hysteresis and flat band voltage as a function of both negative and positive stress fields. Significant differences were found for the case of negative voltage stress between the annealed and non-annealed samples, independently of the stressing time. It was found that the hole trapping effect decreases in the case of the forming gas annealed samples, indicating strong passivation of defects with energies close to the valence band existing in the oxide-semiconductor interface during the forming gas annealing. Finally, a comparison between the degradation dynamics of Germanium and III-V (n-InGaAs) MOS stacks is presented to summarize the main challenges in the integration of reliable Ge–III-V hybrid devices.Fil: Aguirre, Fernando Leonel. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Comisión Nacional de Energía Atómica; ArgentinaFil: Pazos, Sebastián Matías. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; Argentina. Comisión Nacional de Energía Atómica; ArgentinaFil: Palumbo, Félix Roberto Mario. Comisión Nacional de Energía Atómica; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires; ArgentinaFil: Fadida, S.. Technion - Israel Institute of Technology; IsraelFil: Winter, R.. Technion - Israel Institute of Technology; IsraelFil: Eizenberg, M.. Technion - Israel Institute of Technology; Israe

3次元アトムプローブ法を用いたシリコンデバイス中の不純物分布のナノスケール分析

Tohoku University永井康介課

FLASH MEMORY DEVICES WITH METAL FLOATING GATE/METAL NANOCRYSTALS AS THE CHARGE STORAGE LAYER: A STATUS REVIEW

Traditional flash memory devices consist of Polysilicon Control Gate (CG) – Oxide-Nitride-Oxide (ONO - Interpoly Dielectric) – Polysilicon Floating Gate (FG) – Silicon Oxide (Tunnel dielectric) – Substrate. The dielectrics have to be scaled down considerably in order to meet the escalating demand for lower write/erase voltages and higher density of cells. But as the floating gate dimensions are scaled down the charge stored in the floating gate leak out more easily via thin tunneling oxide below the floating gate which causes serious reliability issues and the whole amount of stored charge carrying information can be lost. The possible route to eliminate this problem is to use high-k based interpoly dielectric and to replace the polysilicon floating gate with a metal floating gate. At larger physical thickness, these materials have similar capacitance value hence avoiding tunneling effect.  Discrete nanocrystal memory has also been proposed to solve this problem. Due to its high operation speed, excellent scalability and higher reliability it has been shown as a promising candidate for future non-volatile memory applications. This review paper focuses on the recent efforts and research activities related to the fabrication and characterization of non-volatile memory device with metal floating gate/metal nanocrystals as the charge storage layer

Reliability study of Zr and Al incorporated hf based high-k dielectric deposited by advanced processing

Hafnium-based high-x dielectric materials have been successfully used in the industry as a key replacement for SiO2 based gate dielectrics in order to continue CMOS device scaling to the 22-nm technology node. Further scaling according to the device roadmap requires the development of oxides with higher x values in order to scale the equivalent oxide thickness (EOT) to 0.7 nm or below while achieving low defect densities. In addition, next generation devices need to meet challenges like improved channel mobility, reduced gate leakage current, good control on threshold voltage, lower interface state density, and good reliability. In order to overcome these challenges, improvements of the high-x film properties and deposition methods are highly desirable. In this dissertation, a detail study of Zr and Al incorporated HfO2 based high-κ dielectrics is conducted to investigate improvement in electrical characteristics and reliability. To meet scaling requirements of the gate dielectric to sub 0.7 nm, Zr is added to HfO2 to form Hf1-xZrxO2 with x=0, 0.31 and 0.8 where the dielectric film is deposited by using various intermediate processing conditions, like (i) DADA: intermediate thermal annealing in a cyclical deposition process; (ii) DSDS: similar cyclical process with exposure to SPA Ar plasma; and (iii) As-Dep: the dielectric deposited without any intermediate step. MOSCAPs are formed with TiN metal gate and the reliability of these devices is investigated by subjecting them to a constant voltage stress in the gate injection mode. Stress induced flat-band voltage shift (ΔVFB), stress induced leakage current (SILC) and stress induced interface state degradation are observed. DSDS samples demonstrate the superior characteristics whereas the worst degradation is observed for DADA samples. Time dependent dielectric breakdown (TDDB) shows that DSDS Hf1-xZrxO2 (x=0.8) has the superior characteristics with reduced oxygen vacancy, which is affiliated to electron affinity variation in HfO2 and ZrO2. The trap activation energy levels estimated from the temperature dependent current voltage characteristics also support the observed reliability characteristics for these devices. In another experiment, HfO2 is lightly doped with Al with a variation in Al concentration by depositing intermediate HfAlOx layers. This work has demonstrated a high quality HfO2 based gate stack by depositing atomic layer deposited (ALD) HfAlOx along with HfO2 in a layered structure. In order to get multifold enhancement of the gate stack quality, both Al percentage and the distribution of Al are observed by varying the HfAlOx layer thickness and it is found that \u3c 2% Al/(Al+Hf)% incorporation can result in up to 18% reduction in the average EOT along with up to 41 % reduction in the gate leakage current as compared to the dielectric with no Al content. On the other hand, excess Al presence in the interfacial layer moderately increases the interface state density (Dit). When devices are stressed in the gate injection mode at a constant voltage stress, dielectrics with Al/(Hf+Al)% \u3c 2% show resistance to stress induced flat-band voltage shift (ΔVFB), and stress induced leakage current (SILC). The time dependent dielectric breakdown (TDDB) characteristics show a higher charge to breakdown and an increase in the extracted Weibull slope (β) that further confirms an enhanced dielectric reliability for devices with \u3c 2% Al/(Al+Hf)%

Intrinsic electron trapping in amorphous oxide

We demonstrate that electron trapping at intrinsic precursor sites is endemic in non-glass-forming amorphous oxide films. The energy distributions of trapped electron states in ultra-pure prototype amorphous (a)-HfO2 insulator obtained from exhaustive photo-depopulation experiments demonstrate electron states in the energy range of 2–3 eV below the oxide conduction band. These energy distributions are compared to the results of density functional calculations of a-HfO2 models of realistic density. The experimental results can be explained by the presence of intrinsic charge trapping sites formed by under-coordinated Hf cations and elongated Hf–O bonds in a-HfO2. These charge trapping states can capture up to two electrons, forming polarons and bi-polarons. The corresponding trapping sites are different from the dangling-bond type defects responsible for trapping in glass-forming oxides, such as SiO2, in that the traps are formed without bonds being broken. Furthermore, introduction of hydrogen causes formation of somewhat energetically deeper electron traps when a proton is immobilized next to the trapped electron bi-polaron. The proposed novel mechanism of intrinsic charge trapping in a-HfO2 represents a new paradigm for charge trapping in a broad class of non-glass-forming amorphous insulators