Single Photon Counting UV Solar-Blind Detectors Using Silicon and III-Nitride Materials

Ultraviolet (UV) studies in astronomy, cosmology, planetary studies, biological and medical applications often require precision detection of faint objects and in many cases require photon-counting detection. We present an overview of two approaches for achieving photon counting in the UV. The first approach involves UV enhancement of photon-counting silicon detectors, including electron multiplying charge-coupled devices and avalanche photodiodes. The approach used here employs molecular beam epitaxy for delta doping and superlattice doping for surface passivation and high UV quantum efficiency. Additional UV enhancements include antireflection (AR) and solar-blind UV bandpass coatings prepared by atomic layer deposition. Quantum efficiency (QE) measurements show QE > 50% in the 100–300 nm range for detectors with simple AR coatings, and QE ≅ 80% at ~206 nm has been shown when more complex AR coatings are used. The second approach is based on avalanche photodiodes in III-nitride materials with high QE and intrinsic solar blindness

Single-Photon Avalanche Diodes in a 0.16 μm BCD Technology With Sharp Timing Response and Red-Enhanced Sensitivity

CMOS single-photon avalanche diodes (SPADs) have recently become an emerging imaging technology for applications requiring high sensitivity and high frame-rate in the visible and near-infrared range. However, a higher photon detection efficiency (PDE), particularly in the 700-950 nm range, is highly desirable for many growing markets, such as eye-safe three-dimensional imaging (LIDAR). In this paper, we report the design and characterization of SPADs fabricated in a 0.16 mu m BCD (Bipolar-CMOS-DMOS) technology. The overall detection performance is among the best reported in the literature: 1) PDE of 60% at 500 nm wavelength and still 12% at 800 nm; 2) very low dark count rate of < 0.2 cps/mu m(2) (in counts per second per unit area); 3) < 1% afterpulsing probability with 50 ns dead-time; and 4) temporal response with 30 ps full width at half-maximum and less than 50 ps diffusion tail time constant

Ultra-low noise, high-frame rate readout design for a 3D-stacked CMOS image sensor

Due to the switch from CCD to CMOS technology, CMOS based image sensors have become smaller, cheaper, faster, and have recently outclassed CCDs in terms of image quality. Apart from the extensive set of applications requiring image sensors, the next technological breakthrough in imaging would be to consolidate and completely shift the conventional CMOS image sensor technology to the 3D-stacked technology. Stacking is recent and an innovative technology in the imaging field, allowing multiple silicon tiers with different functions to be stacked on top of each other. The technology allows for an extreme parallelism of the pixel readout circuitry. Furthermore, the readout is placed underneath the pixel array on a 3D-stacked image sensor, and the parallelism of the readout can remain constant at any spatial resolution of the sensors, allowing extreme low noise and a high-frame rate (design) at virtually any sensor array resolution. The objective of this work is the design of ultra-low noise readout circuits meant for 3D-stacked image sensors, structured with parallel readout circuitries. The readout circuit’s key requirements are low noise, speed, low-area (for higher parallelism), and low power. A CMOS imaging review is presented through a short historical background, followed by the description of the motivation, the research goals, and the work contributions. The fundamentals of CMOS image sensors are addressed, as a part of highlighting the typical image sensor features, the essential building blocks, types of operation, as well as their physical characteristics and their evaluation metrics. Following up on this, the document pays attention to the readout circuit’s noise theory and the column converters theory, to identify possible pitfalls to obtain sub-electron noise imagers. Lastly, the fabricated test CIS device performances are reported along with conjectures and conclusions, ending this thesis with the 3D-stacked subject issues and the future work. A part of the developed research work is located in the Appendices.Devido à mudança da tecnologia CCD para CMOS, os sensores de imagem em CMOS tornam se mais pequenos, mais baratos, mais rápidos, e mais recentemente, ultrapassaram os sensores CCD no que respeita à qualidade de imagem. Para além do vasto conjunto de aplicações que requerem sensores de imagem, o próximo salto tecnológico no ramo dos sensores de imagem é o de mudar completamente da tecnologia de sensores de imagem CMOS convencional para a tecnologia “3D-stacked”. O empilhamento de chips é relativamente recente e é uma tecnologia inovadora no campo dos sensores de imagem, permitindo vários planos de silício com diferentes funções poderem ser empilhados uns sobre os outros. Esta tecnologia permite portanto, um paralelismo extremo na leitura dos sinais vindos da matriz de píxeis. Além disso, num sensor de imagem de planos de silício empilhados, os circuitos de leitura estão posicionados debaixo da matriz de píxeis, sendo que dessa forma, o paralelismo pode manter-se constante para qualquer resolução espacial, permitindo assim atingir um extremo baixo ruído e um alto debito de imagens, virtualmente para qualquer resolução desejada. O objetivo deste trabalho é o de desenhar circuitos de leitura de coluna de muito baixo ruído, planeados para serem empregues em sensores de imagem “3D-stacked” com estruturas altamente paralelizadas. Os requisitos chave para os circuitos de leitura são de baixo ruído, rapidez e pouca área utilizada, de forma a obter-se o melhor rácio. Uma breve revisão histórica dos sensores de imagem CMOS é apresentada, seguida da motivação, dos objetivos e das contribuições feitas. Os fundamentos dos sensores de imagem CMOS são também abordados para expor as suas características, os blocos essenciais, os tipos de operação, assim como as suas características físicas e suas métricas de avaliação. No seguimento disto, especial atenção é dada à teoria subjacente ao ruído inerente dos circuitos de leitura e dos conversores de coluna, servindo para identificar os possíveis aspetos que dificultem atingir a tão desejada performance de muito baixo ruído. Por fim, os resultados experimentais do sensor desenvolvido são apresentados junto com possíveis conjeturas e respetivas conclusões, terminando o documento com o assunto de empilhamento vertical de camadas de silício, junto com o possível trabalho futuro

Development and Testing of a High Resolution PET Detector for Prostate Imaging

According to the American Cancer Society one in six men will be diagnosed with prostate cancer in their lifetime. Current methods for screening of prostate cancer including various PSA blood tests, as well as the digital rectal exam, are unreliability while current imaging modalities clinically employed (US, CT, MRI) are unable to localize intraprostatic cancer(s). Consequently, diagnosis via core needle biopsy is problematic and a game of chance at best. Therefore, in response to new radiopharmaceuticals applicable to both internal and external prostate cancer visualization and localization, novel prostate specific nuclear medical imagers are being developed.;The first prototype of a compact prostate specific PET detector utilizing silicon photomultiplier (SiPM) technology has been developed and tested at West Virginia University. The compact detector is proposed as an endorectal probe placed proximally to the rectal wall/prostate interface and operating in coincidence with one or more externally mounted large area gamma detectors or in tandem with a clinical whole body PET scanner. To ensure high reconstruction resolution, the scintillation array of the compact detector will be coupled to SiPMs on both axial ends in a dual ended readout approach. Such an approach allows for the extraction of continuous depth of interaction (DOI) information thus minimizing the effects of parallax error and providing nearly isotropic and uniform spatial resolution throughout the entire detector field of view (FOV).;Two compact DOI based prototype detectors were developed and tested. While both utilize pixelated LYSO scintillation crystal arrays, the first has a crystal pitch of 1.0 mm and is coupled to SensL SiPMs, while the second has a crystal pitch of 0.7mm and is coupled to Hamamatsu SiPMs. Initial proof of concept studies were preformed using the SensL based detector while more extensive and systematic studies were preformed using the Hamamatsu based detector. Ultimately, when averaged over all crystals and all depths the Hamamatsu based detector achieved a depth of interaction resolution of 0.78+/-0.09 mm FWHM and an energy resolution of 13.2+/-0.7 % FWHM. Validation studies with regards to the efficacy of incorporating DOI information extracted from a small compact DOI based PET detector module into image reconstruction algorithms were also preformed