Port-Hamiltonian formulation of nonlinear electrical circuits

We consider nonlinear electrical circuits for which we derive a port-Hamiltonian formulation. After recalling a framework for nonlinear port-Hamiltonian systems, we model each circuit component as an individual port-Hamiltonian system. The overall circuit model is then derived by considering a port-Hamiltonian interconnection of the components. We further compare this modeling approach with standard formulations of nonlinear electrical circuits

Automatic synthesis of analog layout : a survey

A review of recent research in the automatic synthesis of physical geometry for analog integrated circuits is presented. On introduction, an explanation of the difficulties involved in analog layout as opposed to digital layout is covered. Review of the literature then follows. Emphasis is placed on the exposition of general methods for addressing problems specific to analog layout, with the details of specific systems only being given when they surve to illustrate these methods well. The conclusion discusses problems remaining and offers a prediction as to how technology will evolve to solve them. It is argued that although progress has been and will continue to be made in the automation of analog IC layout, due to fundamental differences in the nature of analog IC design as opposed to digital design, it should not be expected that the level of automation of the former will reach that of the latter any time soon

Memristor-Based Digital Systems Design and Architectures

Memristor is considered as a suitable alternative solution to resolve the scaling limitation of CMOS technology. In recent years, the use of memristors in circuits design has rapidly increased and attracted researcher’s interest. Advances have been made to both size and complexity of memristor designs. The development of CMOS transistors shows major concerns, such as, increased leakage power, reduced reliability, and high fabrication cost. These factors have affected chip manufacturing process and functionality severely. Therefore, the demand for new devices is increasing. Memristor, is considered as one of the key element in memory and information processing design due to its small size, long-term data storage, low power, and CMOS compatibility. The main objective in this research is to design memristor-based arithmetic circuits and to overcome some of the Memristor based logic design issues. In this thesis, a fast, low area and low power hybrid CMOS memristor based digital circuit design were implemented. Small and large-scale memristor based digital circuits are implemented and provided a solutions for overcoming the memristor degradation and fan-out challenges. As an example, a 4- bit LFSR has been implemented by using MRL scheme with 64 CMOS devices and 64 memristors. The proposed design is more efficient in terms of the area when compared with CMOS- based LFSR circuits. The simulation results proves the functionality of the design. This approach presents acceptable speed in comparison with CMOS-based design and it is faster than IMPLY-based memrisitive LFSR. The propped LFSR has 841 ps de-lay. Furthermore, the proposed design has a significant power reduction of over 66% less than CMOS-based approach. This thesis proposes implementation of memristive 2-D median filter and extends previously published works on memristive Filter design to include this emerging technology characteristics in image processing. The proposed circuit was designed based on Pt/TaOx/Ta redox-based device and Memristor Ratioed Logic (MRL). The proposed filter is designed in Cadence and the memristive median approved tested circuit is translated to Verilog-XL as a behavioral model. Different 512 _ 512 pixels input images contain salt and pepper noise with various noise density ratios are applied to the proposed median filter and the design successfully has substantially removed the noise. The implementation results in comparison with the conventional filters, it gives better Peak Signal to Noise Ratio (PSNR) and Mean Absolute Error (MAE) for different images with different noise density ratios while it saves more area as compared to CMOS-based design. This dissertation proposes a comprehensive framework for design, mapping and synthesis of large-scale memristor-CMOS circuits. This framework provides a synthesis approach that can be applied to all memristor-based digital logic designs. In particular, it is a proposal for a characterization methodology of memristor-based logic cells to generate a standard cell library for large scale simulation. The proposed framework is implemented in the Cadence Virtuoso schematic-level environment and was veri_ed with Verilog-XL, MATLAB, and the Electronic Design Automation (EDA) Synopses compiler after being translated to the behavioral level. The proposed method can be applied to implement any digital logic design. The frame work is deployed for design of the memristor-based parallel 8-bit adder/subtractor and a 2-D memristive-based median filter

Output Impedance Diffusion into Lossy Power Lines

Output impedances are inherent elements of power sources in the electrical grids. In this paper, we give an answer to the following question: What is the effect of output impedances on the inductivity of the power network? To address this question, we propose a measure to evaluate the inductivity of a power grid, and we compute this measure for various types of output impedances. Following this computation, it turns out that network inductivity highly depends on the algebraic connectivity of the network. By exploiting the derived expressions of the proposed measure, one can tune the output impedances in order to enforce a desired level of inductivity on the power system. Furthermore, the results show that the more "connected" the network is, the more the output impedances diffuse into the network. Finally, using Kron reduction, we provide examples that demonstrate the utility and validity of the method

Organic Diode and Other Circuit Element Creation Through Variations of Poly(3,4-ethylenedioxythiophene)Synthesis

Fabricating semiconductor junction diodes can be costly in price and time. It typically involves long turn around time from the foundry, which requires precise machines and a clean room environment to prevent contamination from air born materials. This intensive process of fabricating diodes, means the cost will increase as the machines to process the semiconductor material need to become more precise. The proposed solution to the problem of cost and time is to create a printing system that is capable of printing diodes and circuits on various substrates. The experiments described in this thesis investigate the possible diode material, Poly(3,4-ethylenedioxythiophene), a polymer in aqueous dispersion. Variation in experiments with the weight ratios for the chemicals used for synthesis of this polymer are used as a benchmark to find the optimum weight ratios for the Poly(3,4-ethylenedioxythiophene) synthesis, to create an asymmetric rectifying diode, using continuous ink jet printing technology

Hall Effect Gyrators and Circulators

The electronic circulator, and its close relative the gyrator, are invaluable tools for noise management and signal routing in the current generation of low-temperature microwave systems for the implementation of new quantum technologies. The current implementation of these devices using the Faraday effect is satisfactory, but requires a bulky structure whose physical dimension is close to the microwave wavelength employed. The Hall effect is an alternative non-reciprocal effect that can also be used to produce desired device functionality. We review earlier efforts to use an ohmically-contacted four-terminal Hall bar, explaining why this approach leads to unacceptably high device loss. We find that capacitive coupling to such a Hall conductor has much greater promise for achieving good circulator and gyrator functionality. We formulate a classical Ohm-Hall analysis for calculating the properties of such a device, and show how this classical theory simplifies remarkably in the limiting case of the Hall angle approaching 90 degrees. In this limit we find that either a four-terminal or a three-terminal capacitive device can give excellent circulator behavior, with device dimensions far smaller than the a.c. wavelength. An experiment is proposed to achieve GHz-band gyration in millimetre (and smaller) scale structures employing either semiconductor heterostructure or graphene Hall conductors. An inductively coupled scheme for realising a Hall gyrator is also analysed.Comment: 18 pages, 15 figures, ~5 MB. V3: sections V-VIII revisited plus other minor changes, Fig 2 added. Submitted to PR

Electromagnetic Interference and Compatibility

Recent progress in the fields of Electrical and Electronic Engineering has created new application scenarios and new Electromagnetic Compatibility (EMC) challenges, along with novel tools and methodologies to address them. This volume, which collects the contributions published in the “Electromagnetic Interference and Compatibility” Special Issue of MDPI Electronics, provides a vivid picture of current research trends and new developments in the rapidly evolving, broad area of EMC, including contributions on EMC issues in digital communications, power electronics, and analog integrated circuits and sensors, along with signal and power integrity and electromagnetic interference (EMI) suppression properties of materials