An amorphous oxide semiconductor thin-film transistor route to oxide electronics

Amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) invented only one decade ago are now being commercialized for active-matrix liquid crystal display (AMLCD) backplane applications. They also appear to be well positioned for other flat-panel display applications such as active-matrix organic light-emitting diode (AMOLED) applications, electrophoretic displays, and transparent displays. The objectives of this contribution are to overview AOS materials design; assess indium gallium zinc oxide (IGZO) TFTs for AMLCD and AMOLED applications; identify several technical topics meriting future scrutiny before they can be confidently relied upon as providing a solid scientific foundation for underpinning AOS TFT technology; and briefly speculate on the future of AOS TFTs for display and non-display applications

Flash Lamp Annealed LTPS TFTs with ITO Bottom-Gate Structures

As displays continue to increase in resolution and refresh rate, new materials for thin film transistors (TFTs) are required. Low temperature polycrystalline silicon (LTPS) formed by excimer laser annealing (ELA) has been very successful and has been implemented in small displays, but cost and scalability issues prevent it from entering larger display products. Currently LPTS TFTs are top-gate structures due to manufacturing challenges associated with crystallizing thin film silicon when a thermally conductive gate is under portions and insulating glass under others. Bottom-gate devices offer the benefit of higher breakdown voltage, better dielectric-semiconductor interface quality, and direct access to the back-channel region for interface trap passivation. The ability to fabricate bottom-gate devices would allow for different integration and design schemes and is a prerequisite for double gate structures. Flash lamp annealed (FLA) LTPS is an attractive method to expand the size of displays that use high mobility TFTs due to its scalability and parallel production nature. In this work bottom-gate LTPS TFTs were fabricated via FLA with indium tin oxide (ITO), a transparent conductive oxide, used as the gate electrode. A p-channel TFT with 4 µm channel length crystallized with a FLA energy of 4.4 J/cm2 for 250 µs demonstrated a low-field mobility of 190 cm2/(Vs), a subthreshold slope of 325 mV/dec, on/off state ratio of seven orders of magnitude, and a threshold voltage of -5.4 V. A dielectric failure mechanism was identified that compromised the transistor operation under high drain bias and an alternative dopant introduction techniques were proposed to mitigate this issue. An effect due to the transduction of optical energy from the field to thermal energy under the channel via the gate was observed. Details of the FLA crystallization process, device fabrication, and electrical characteristics will be presented

Device-circuit interactions and impact on TFT circuit-system design

This paper reviews the importance of device-circuit interactions (DCI) and its consideration when designing thin film transistor circuits and systems. We examine temperature- and process-induced variations and propose a way to evaluate the maximum achievable intrinsic performance of the TFT. This is aimed at determining when DCI becomes crucial for a specific application. Compensation methods are then reviewed to show examples of how DCI is considered in the design of AMOLED displays. Other designs such as analog front-end and image sensors are also discussed, where alternate circuits should be designed to overcome the limitations of the intrinsic device properties

Indium-Gallium-Zinc Oxide Thin-Film Transistors for Active-Matrix Flat-Panel Displays

Amorphous oxide semiconductors (AOSs) including amorphous InGaZnO (a-IGZO) areexpected to be used as the thin-film semiconducting materials for TFTs in the next-generation ultra-high definition (UHD) active-matrix flat-panel displays (AM-FPDs). a-IGZO TFTs satisfy almost all the requirements for organic light-emitting-diode displays (OLEDs), large and fast liquid crystal displays (LCDs) as well as three-dimensional (3D) displays, which cannot be satisfied using conventional amorphous silicon (a-Si) or polysilicon (poly-Si) TFTs. In particular, a-IGZO TFTs satisfy two significant requirements of the backplane technology: high field-effect mobility and large-area uniformity.In this work, a robust process for fabrication of bottom-gate and top-gate a-IGZO TFTs is presented. An analytical drain current model for a-IGZO TFTs is proposed and its validation is demonstrated through experimental results. The instability mechanisms in a-IGZO TFTs under high current stress is investigated through low-frequency noise measurements. For the first time, the effect of engineered glass surface on the performance and reliability of bottom-gate a-IGZO TFTs is reported. The effect of source and drain metal contacts on electrical properties of a-IGZO TFTs including their effective channel lengths is studied. In particular, a-IGZO TFTs with Molybdenum versus Titanium source and drain electrodes are investigated. Finally, the potential of aluminum substrates for use in flexible display applications is demonstrated by fabrication of high performance a-IGZO TFTs on aluminum substrates and investigation of their stability under high current electrical stress as well as tensile and compressive strain

Investigation of Hysteresis, Off-Current, and Instability in In-Ga-Zn Oxide Thin Film Transistors Under UV Light Irradiation

학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2013. 8. 한민구.Amorphous oxide-based thin film transistors (TFTs), for instance, amorphous indium gallium zinc oxide (IGZO) TFTs, are expected to meet emerging technological demands where conventional silicon-based TFTs confront with the limitation of the electrical performance such as field-effect mobility, uniformity, and process temperature. However, the variation of characteristics and the stability in IGZO TFTs under light illumination still needs to be verified for further application. In this thesis, the characteristics and reliability of IGZO TFTs under light illumination were investigated. Furthermore, the effect of mechanical bending on flexible IGZO TFTs was analyzed for flexible displays. First, the effects of light on initial characteristics of IGZO TFTs were studied. Under illuminated condition, significant hysteresis and off-current (Ioff) were observed due to the creation of donor-like interface states near conduction band energy level arising from ionized oxygen vacancy (Vo2+). From hysteresis, the response time (~10^0 s) of Vo2+ at the interface was obtained, which is important parameter for analyzing hysteresis. On the contrary to conventional mechanism of photo-current, the change in Ioff increased with increasing light intensity. The increase of Ioff occurs because Vo2+ at the interface prevents carrier depletion with Fermi-level pinning. Second, the reliability of IGZO TFTs under the conditions combined with negative gate bias stress and light illumination were investigated. Under illumination, negative shift of threshold voltage (Vth) is accelerated by the photo-induced holes and Vo2+. In TFTs featuring passivation layer, a long characteristic time (~10^2 s) for Vo2+ generation in IGZO bulk was extracted. It was also found that the charge trapping probability of single carrier did not change. Finally, the reliability of flexible IGZO TFTs was analyzed when the bending radius was 10 mm, 4 mm, and 2 mm. The device characteristics were hardly changed under mechanical strain unless the gate bias stress was applied. However, Vth shift was increased by mechanical strain under the gate bias stress due to valence band energy level shift.Abstract i Contents iv List of Tables vii List of Figures viii Chapter 1 Introduction 1 1.1 Recent flat panel display 1 1.2 Dissertation Organization 8 Chapter 2 Review of IGZO TFTs 9 2.1 Oxide semiconductor for TFT application 10 2.2 Reliability of IGZO TFTs 17 2.3 Passivation layer in IGZO TFTs 24 Chapter 3 Effect of light on initial characteristics of IGZO TFTs 27 3.1 Experiment 29 3.2 Electrical Characteristics of IGZO TFT under light illumination 33 3.3 Conclusion 58 Chapter 4 Effect of UV light on reliability of IGZO TFTs 61 4.1 Reliability of IGZO TFTs depending on gate insulator layer 63 4.2 IGZO TFT with SiO2 gate insulator layer 67 4.3 IGZO TFT with SiNx gate insulator layer 81 4.4 Conclusion 96 Chapter 5 Characteristics of IGZO TFT on Flexible Substrate 99 5.1 Overview of flexible TFT 100 5.2 Fabrication and Experiment of Flexible IGZO TFT 107 5.3 The effect of mechanical bending on electrical characteristics of Flexible IGZO TFT 112 5.4 The effect of mechanical bending on stability of Flexible IGZO TFT 119 5.5 The effect of light on flexible IGZO TFTs 131 5.6 Conclusion 136 Chapter 6 Summary 139 Appendix A Design and Fabrication of Simultaneous Emission AMOLED Pixel Circuit 143 Bibliography 165 초 록 177Docto

Thin-film transistors fabricated using sputter deposition of zno

Development of thin film transistors (TFTs) with conventional channel layer materials, such as amorphous silicon (a-Si) and polysilicon (poly-Si), has been extensively investigated. A-Si TFT currently serves the large flat panel industry; however advanced display products are demanding better TFT performance because of the associated low electron mobility of a-Si. This has motivated interest in semiconducting metal oxides, such as Zinc Oxide (ZnO), for TFT backplanes. This work involves the fabrication and characterization of TFTs using ZnO deposited by sputtering. An overview of the process details and results from recently fabricated TFTs following a full-factorial designed experiment will be presented. Material characterization and analysis of electrical results will be described. The investigated process variables were the gate dielectric and ZnO sputtering process parameters including power density and oxygen partial pressure. Electrical results showed clear differences in treatment combinations, with certain I-V characteristics demonstrating superior performance to preliminary work. A study of device stability will also be discussed

금속유도 측면결정화 박막 트랜지스터의 전기적 성능 향상을 위한 고귀한 방법

학위논문 (박사)-- 서울대학교 대학원 : 공과대학 재료공학부, 2018. 2. 주승기.금속유도 결정화에 의해 제작된 저온 다결정 실리콘 박막 트랜지스터는 액티브 매트릭스 평판 디스플레이에 사용하기에 매력적이다. 그러나, 금속유도 결정화에 의해 제작된 실리콘 박막의 결정 입계에는 니켈 실리사이드가 존재하며, 이러한 니켈 실리사이드는 큰 누설 전류를 유발한다. 본 연구에서는 게터층으로 비정질 실리콘, 에치 스톱층으로 실리콘 산화막을 사용하여 니켈 불순물을 제거하는 게터링 방법을 이용하여 금속유도 결정화 다결정 실리콘 박막 트랜지스터의 누설 전류를 감소시켰다. 금속유도 결정화 다결정 실리콘 박막의 니켈 트랩 상태 밀도가 게터링에 의해 감소하였으며, 그 결과 금속유도 결정화 다결정 실리콘 박막 트랜지스터의 누설 전류가 감소하였다. 또한, 게터링 횟수가 증가 할수록 금속유도 결정화 다결정 실리콘 박막 트랜지스터의 누설 전류가 점차적으로 감소 하였다. 이러한 게터링에 의한 누설전류 감소 효과를 설명하기 위해 적절한 모델을 제시하였다. 또한 게터링을 니켈 실리사이드 유도 측면결정화 다결정 실리콘 박막 트랜지스터에 적용하여 누설 전류를 더욱 감소 시켰다. 금속유도 측면결정화에 의해 제작된 다결정 실리콘 박막 트랜지스터는 대규모 액티브 매트릭스 평판 디스플레이의 스위칭 및 구동 소자로서 매력적인 장치 중 하나이다. 하지만 금속유도 측면결정화에 의해 제작된 다결정 실리콘 박막 트랜지스터는 누설전류가 크다는 단점을 가지고 있다. 금속유도 측면결정화 다결정 실리콘 박막 트랜지스터의 누설 전류는 게이트 절연체와 다결정 실리콘 활성층 사이의 계면에서 니켈 불순물에 기인한 하전된 트랩 상태에 의해 유도되고, 트랩 상태는 게이트와 드레인 사이의 높은 전계에 의해 활성화된다. 본 연구에서는 2중 노광 방법으로 드레인 오프셋 영역을 형성하여 금속유도 측면결정화 다결정 실리콘 박막 트랜지스터의 누설전류를 감소시켰다. 본 연구에서는 boron 이 금속유도 측면결정화 성장 속도에 미치는 영향을 토대로, boron이 비정질 실리콘의 결정화에 미치는 영향에 대하여 연구하였다. 저압 화학 기상 증착법 및 플라즈마 강화 화학 기상 증착법으로 증착된 비정질 실리콘은 boron에 의한 결정화에 있어 상이한 결과를 보였다. 저압 화학 기상 증착법으로 증착된 비정질 실리콘에 boron 을 도핑 하였을 경우, 니켈을 증착하지 않아도 560℃에서 2시간 내에 실리콘이 결정화 되었지만 플라즈마 강화 화학 기상 증착법으로 증착된 비정질 실리콘은 boron 이 도핑 되어도 니켈 없이는 결정화가 되지 않았다. 하지만 플라즈마 강화 화학 기상 증착법으로 증착된 비정질 실리콘에 boron 을 도핑 할 경우 금속유도 측면결정화 성장 속도가 상당히 증가하였다. 수소 분위기에서 열처리 할 경우 금속유도 측면결정화 성장 속도가 감소하였으며, boron 에 의해 결정화된 실리콘의 면저항이 증가 하였다. 본 연구에서는 이러한 원인을 규명하기 위해 boron 에 의한 실리콘 결정화의 적절한 모델을 제시하였다. 일반 유리기판과 열처리된 유리기판 위에 금속유도 측면결정화 다결정 실리콘 박막 트랜지스터를 제작하여 압축응력이 금속유도 측면결정화 성장 속도 및 전기적 특성에 미치는 영향을 연구하였다. 유리기판의 수축을 억제하기 위해 사전에 550℃에서 40시간동안 유리기판을 열처리하였다. 결정화 및 전기적 활성화 후 일반 유리기판의 변형률은 0.0067% 이었고 열처리된 유리기판의 변형률은 0.0012% 이었다. 일반 유리기판 위에서의 금속유도 측면결정화 성장 속도는 열처리된 유리기판 위에서의 금속유도 측면결정화 성장 속도 보다 느렸다. 유리기판의 수축으로 인한 압축변형은 다결정 실리콘 박막에 마이크로 크랙 및 공극을 증가 시킨 것으로 생각 되며, 그 결과 일반 유리기판 위에 제작된 다결정 실리콘 박막 트랜지스터 의 field effect mobility, threshold voltage, subthreshold slope 이 악화 된 것으로 볼 수 있다. 그리고 일반 유리기판 위에 제작된 다결정 실리콘 박막 트랜지스터는 소자 위치에 따른 불균일한 전기적 특성을 보였다. 반면에, 열처리된 유리기판 위에 제작된 다결정 실리콘 박막 트랜지스터는 뛰어난 전기적 특성과 소자 위치에 따른 균일한 전기적 특성을 보였다.Low-temperature polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) fabricated via metal-induced crystallization (MIC) are attractive candidates for use in active-matrix flat-panel displays. However, these exhibit a large leakage current due to the nickel silicide being trapped at the grain boundaries of the poly-Si. We reduced the leakage current of the MIC poly-Si TFTs by developing a gettering method to remove the Ni impurities using a Si getter layer and natively-formed SiO2 as the etch stop interlayer. The Ni trap state density (Nt) in the MIC poly-Si film decreased after the nickel silicide gettering, and as a result, the leakage current of the MIC poly-Si TFTs decreased. Furthermore, the leakage current of MIC poly-Si TFTs gradually decreased with additional gettering. To explain the gettering effect on MIC poly-Si TFTs, we suggest an appropriate model. Gettering method was also applied to nickel silicide seed induced lateral crystallized (SILC) poly-Si TFTs. Although the nickel silicide was already reduced by SILC, the nickel silicide in the SILC poly-Si film could be further reduced through gettering. As a result, the leakage current of the SILC poly-Si TFTs decreased. Poly-Si TFT fabricated by metal-induced lateral crystallization (MILC) is an attractive candidate for switching and driving elements in large-scaled active-matrix flat-panel displays. However, the MILC poly-Si TFTs have a large leakage current. The leakage current of MILC poly-Si TFTs is induced by charged trap state which is originated from Ni impurities at the interface between gate insulator and poly-Si active layer, and the trap state is activated by high electric field between the gate and the drain. In this study, we developed a double exposure method to form drain offset region. The leakage current of MILC poly-Si TFTs fabricated by double exposure method drastically decreased. In this study, based on the effect of boron on MILC growth rate, we investigated the effects of boron on the crystallization of amorphous silicon (a-Si). Low pressure chemical vapor deposition (LPCVD) a-Si and plasma enhanced chemical vapor deposition (PECVD) a-Si showed different tendencies in crystallization by boron. When LPCVD intrinsic a-Si was doped with boron, a-Si was crystallized without Ni at 560 °C within 2 h, whereas boron-doped PECVD a-Si was not crystallized without Ni. However, the MILC growth rate of boron-doped PECVD a-Si significantly increased. The MILC growth was suppressed when annealed in hydrogen ambient, and the sheet resistance of boron-induced crystallized Si annealed in hydrogen ambient was higher than that annealed in vacuum. To elucidate these phenomena, we suggested an appropriate model of boron-induced silicon crystallization. MILC poly-Si TFTs were fabricated on the compacted glass and the bare glass substrate, and we investigated compressive stress effects on MILC growth rate and electrical properties of MILC poly-Si TFTs. We compacted the glass at 550 °C for 40 h to suppress glass substrate shrinkage. The strain rate of the bare glass substrate was 0.0067% and that of the compacted glass substrate was 0.0012% after crystallization and electrical activation. The MILC growth rate on the bare glass substrate was lower than that on the compacted glass substrate. Compressive strain resulting from glass substrate shrinkage generally increases the size of the micro-cracks and vacancies in Si film, and as a result, field effect mobility, threshold voltage and subthreshold slope of the MILC poly-Si TFTs fabricated on the bare glass substrate deteriorated. The uniformity of electrical properties of MILC poly-Si TFTs was degraded on the bare glass substrate. On the other hand, the MILC poly-Si TFTs fabricated on the compacted glass substrate showed excellent uniformity of electrical properties.Chapter 1. Introduction 1 1.1 Thin-Film Transistors 1 1.2 Flat Panel Displays 2 1.2.1 Liquid Crystal Display 2 1.2.2 Active Matrix Organic Light Emitting Diode 4 Chapter 2. Background and Motivation 5 2.1 Low Temperature Polycrystalline Silicon Thin-Film Transistors 5 2.2 Metal Induced Lateral Crystallization 7 2.3 Electrical Properties of Polycrystalline Silicon Thin-Film Transistors 11 2.3.1 Field-Effect Mobility 11 2.3.2 Threshold Voltage 12 2.3.3 Subthreshold Slope 13 2.3.4 Leakage Current 14 Chapter 3. Gettering 16 3.1 Introduction 16 3.2 Experiment 18 3.3 Result and Discussion 20 3.4 Conclusion 36 Chapter 4. Drain Offset Gate 37 4.1 Introduction 37 4.2 Experiment 39 4.3 Result and Discussion 41 4.4 Conclusion 49 Chapter 5. Boron Induced Low Temperature Polycrystalline Silicon 50 5.1 Introduction 50 5.2 Experiment 52 5.3 Result and Discussion 53 5.4 Conclusion 63 Chapter 6. Polycrystalline Silicon Thin-Film Transistors on Bare Glass Substrate 64 6.1 Introduction 64 6.2 Experiment 66 6.3 Result and Discussion 68 6.4 Conclusion 80 Chapter 7. Conclusion 81 Bibliography 84 Abstract (in Korean) 108 Achievement 112Docto

전류 센싱 피드백 시스템을 이용한 고안정성 산화물 TFT 쉬프트 레지스터의 설계 및 제작

학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2017. 2. 정덕균.Integration of shift registers on the glass panel allows the display to be thinner, lighter, and cheaper to produce, thanks to the reduction of the number of ICs for scanning horizontal lines. Circuits of the shift register employing n-type thin film transistors (TFTs), such as hydrogenated amorphous silicon (a-Si:H) and oxide TFTs, have been reported. Recently, oxide TFTs attract much attention due to their high mobility (5~10 cm2/V∙s) compared with that of a-Si:H TFT (0.8cm2/V∙s). However, oxide TFTs often suffer from severe degradation of the threshold voltage (VTH) against the temperature and electrical stress. In this paper, in order to compensate the instability of oxide TFTs in the shift register, an oxide TFT with double gates, which can control VTH by varying the top gate bias (VTG) is adopted. The top gate of the double-gate TFT can be fabricated in the same process for the pixel IZO (Indium Zinc Oxide) so that an additional process only for the top gate is not required. Adequate VTG is provided timely, adaptively to the gate of the oxide TFTs to stabilize the threshold voltage. The fabrication result shows that the proposed shift register using VTG set at an adapted value become stable at 100℃ whereas the conventional one is mal-functioning. The optimum VTG varies from product to product and changes continuously over the lifetime of the display. Therefore, the feedback driving system suitable for the proposed shift register is required to search the optimum VTG. The system has two main functionsthe first is to sense the current of shift register and the second is the searching algorithm for finding the optimum VTG. When the transistors are degraded by an external stress, the current of the whole shift registers is changed. The information about the VTH degradation in the shift register can be gathered via current sensing circuit. The sensed current is integrated to generate the output and is forwarded to an ADC. The binary-converted current of shift register is processed by the proposed algorithm in the digital domain for obtaining an optimum VTG and then the result is converted back to analog to generate VTG. The IC implementing such functions is fabricated in a 0.18 μm BCDMOS process. When the shift register current is measured on the conventional system with increasing temperature up to 80℃, it is increased to more than 10 times than that at the room temperature. However, the proposed feedback system keeps a highly stable (<13%) current level of shift register up to 80℃ with an optimized VTG.Abstracts i Table of Contents iii List of Tables v List of Figures vi Chapter 1 Introduction 1 1.1 Background 2 1.2 Outline 7 Chapter 2 Review of oxide-based TFT device and N-type TFT circuit design 8 2.1 Overview 9 2.1.1 Characteristics of Oxide TFT 9 2.2 Oxide-based TFT 14 2.2.1 Electrical characteristics of oxide-based TFT 14 2.2.2 Stability of oxide-based TFT 18 2.3 NMOS driving circuit 24 2.3.1 Bootstrapping driving circuit 24 2.3.2 Shift register with n-type TFT 28 Chapter 3 Proposed Oxide TFT Shift Register 37 3.1 Overview 38 3.2 Characteristic of Double Gate TFT 39 3.3 Design of New shift register 46 3.3.1 Simulation Result of Conventional shift register 46 3.3.2 New shift register using Double Gate TFT 51 3.3.3 Simulation Modeling of Double Gate TFT 58 3.3.4 Simulation and Experimental Result 61 Chapter 4 Real Time Current-Sensing Feedback Compensation System 71 4.1 Overview 72 4.2 System Architecture 74 4.3 Circuit Design 77 4.3.1 Current Sensing Block 77 4.3.2 ADC/DAC Block 85 4.4 Optimum Point Searching Algorithm 100 4.5 System Verification 106 Chapter 5 Summary 116 Appendix A SPICE models 118 Bibliography 120Docto

Investigation on solid-phase crystallization techniques for low temperature polysilicon thin-film transistors

Low-temperature polysilicon (LTPS) has emerged as a dominant technology for high performance thin-film transistors (TFTs) used in mobile liquid crystal display (LCD) and organic light emitting diode (OLED) display products. As users demand higher quality in flat panel displays with a larger viewing area and finer resolution, the improvement in carrier mobility of LTPS compared to that of hydrogenated amorphous silicon (a-Si:H) makes it an excellent candidate as a channel material for TFT. Advantages include improvements in switching speed and the ability to incorporate peripheral scan and data driver circuitry onto a low cost display substrate. Solid-phase crystallization (SPC) is a useful technique to realize polysilicon films due to its simplicity and low cost compared to excimer-laser annealing (ELA),which has many challenges in back-plane manufacturing on large glass panels.Metal induced crystallization (MIC) results in polycrystalline silicon films with grain size as large as tens of microns. Flash-lamp annealing (FLA) is a new and novel method to crystallize a-Si films at high temperature without distortion of the glass substrate by performing an annealing within millisecond range.This work investigates SPC, MIC and FLA techniques to realize LTPS films. In addition, TFTs were designed and fabricated to characterize the device quality of the semiconductor layer, and to compare the performance of different structural arrangements

The Characteristics and Reliability of In-Ga-Zn-O Thin-Film Transistors on Glass and Flexible Polyimide Substrate under Temperature and Illumination Stress

학위논문 (박사)-- 서울대학교 대학원 : 전기컴퓨터공학부, 2013. 2. 한민구.Recently, flexible displays have attracted considerable attention in the emerging electronic device market. Flexible plastic substrates have the advantages such as flexibility, ruggedness and light-weight and its low cost, compared to glass substrate. Indium-Gallium-Zinc-Oxide thin-film transistors (IGZO TFTs) are promising candidates for next generation display backplane due to high mobility, good uniformity, and low process temperature, which suitable for flexible display. In this thesis, the characteristics and reliability of flexible IGZO TFTs were presented and discussed. Firstly, the electrical characteristics and reliability of IGZO TFTs on glass substrate are discussed. The IGZO TFTs were fabricated on a glass substrate with an inverted staggered structure. The initial electrical characteristics and gate bias induced instability was investigated. And drain bias induced instability is investigated. Unique degradation phenomenon was observed under the high drain bias stress. After the high drain bias stress, the drain current, measured at the low drain bias, was significantly decreased. Based on the experimental results, I proposed a degradation model for the high drain bias induced degradation. And light-induced hysteresis of IGZO TFTs is investigated. Hysteresis was observed under the 450-nm illumination, and was increased with temperature. And hysteresis was increased with wavelength decrease. Light-induced hysteresis occurs due to increased sub-band gap states at the interface between the gate insulator layer and the active layer. Also, bias illumination stress induced instability is investigated. The transfer curve did not change after positive bias illumination stress. However, the transfer curve shifted to a negative direction after negative bias illumination stress. The transfer curve could be shifted to the negative direction after negative bias illumination stress due to the increase of VO2+ states. Secondly, the electrical characteristics and reliability of IGZO TFTs on flexible substrate are discussed. The IGZO TFTs were fabricated on a polyimide (PI) substrate with an inverted staggered structure. An inorganic buffer layer, composed of SiO2 and SiNx multi-layer, was employed, in order to prevent the environmental stress, such as water or oxygen molecules. The effects of PI and inorganic buffer layer on the characteristics and reliability of IGZO TFTs were investigated. And the effects of passivation layer on the electrical stability of IGZO TFTs with single passivation layer and double passivation layer fabricated on PI substrate were investigated. The positive bias stress and negative bias stress were applied to the IGZO TFTs at various temperatures from 20 oC to 80 oC. The threshold voltage shift of double passivation device was larger than that of single passivation device under NBTS. The threshold voltage shift of double passivation device was slightly less than that of single passivation device under PBTS. The threshold voltage shift of NBTS is considerably increased than that of PBTS at high temperature due to the difference between conduction band offset and valence band offset. Lastly, the effects of mechanical bending on the electrical stability of flexible IGZO TFTs were investigated.Abstract i Contents iv List of Tables vii List of Figures viii Chapter 1 Introduction 1 1.1 Evolution of display technology 2 1.2 Outline of this thesis 10 Chapter 2 Review of IGZO TFTs and flexible display technology 11 2.1 Recent issues of IGZO TFTs 12 2.1.1 Reliability under bias temperature stress 14 2.1.2 Reliability under negative bias illumination stress 18 2.1.3 Reliability under various environments 24 2.2 Various backplane materials for flexible display 30 Chapter 3 The electrical characteristics and reliability of IGZO TFTs on glass substrate 33 3.1 Overview 34 3.2 Fabrication process of IGZO TFTs on glass substrate 36 3.3 Electrical characteristics of IGZO TFTs 39 3.4 Gate bias induced instability without illumination 42 3.5 Drain bias induced instability without illumination 46 3.5.1 Introduction 46 3.5.2 Experimental methods 48 3.5.3 Experimental results and discussions 49 3.5.4 Conclusion 63 3.6 Light-Induced Hysteresis of IGZO TFTs with Various Wavelengths 64 3.6.1 Introduction 64 3.6.2 Experimental methods 65 3.6.3 Experimental results and discussions 66 3.6.4 Conclusion 75 3.7 Light-Induced Hysteresis of IGZO TFTs with Various Temperatures 76 3.7.1 Introduction 76 3.7.2 Experimental methods 78 3.7.3 Experimental results and discussions 79 3.7.4 Conclusion 89 3.8 Bias illumination stress induced instability 90 Chapter 4 The electrical characteristics and reliability of IGZO TFTs on flexible substrate 99 4.1 Overview 100 4.2 Fabrication process of IGZO TFTs on polyimide substrate 102 4.3 Comparison between IGZO TFTs on glass substrate and flexible substrate 105 4.4 Effects of the buffer layer on the electrical characteristics of flexible IGZO TFTs 109 4.5 Effects of passivation layer on the electrical stability of flexible IGZO TFTs 115 4.5.1 Introduction 115 4.5.2 Experimental methods 117 4.5.3 Experimental results and discussions 119 4.5.4 Conclusion 127 4.6 Effects of humidity on the electrical characteristics of IGZO TFTs 128 4.7 Effects of mechanical bending on the electrical stability of flexible IGZO TFTs 139 Chapter 5 Summary 154 Bibliography 156 초 록 175Docto