Monatomic phase change memory

Phase change memory has been developed into a mature technology capable of storing information in a fast and non-volatile way, with potential for neuromorphic computing applications. However, its future impact in electronics depends crucially on how the materials at the core of this technology adapt to the requirements arising from continued scaling towards higher device densities. A common strategy to finetune the properties of phase change memory materials, reaching reasonable thermal stability in optical data storage, relies on mixing precise amounts of different dopants, resulting often in quaternary or even more complicated compounds. Here we show how the simplest material imaginable, a single element (in this case, antimony), can become a valid alternative when confined in extremely small volumes. This compositional simplification eliminates problems related to unwanted deviations from the optimized stoichiometry in the switching volume, which become increasingly pressing when devices are aggressively miniaturized. Removing compositional optimization issues may allow one to capitalize on nanosize effects in information storage

What constitutes a nanoswitch? A Perspective

Progress in the last two decades has effectively integrated spintronics and nanomagnetics into a single field, creating a new class of spin-based devices that are now being used both to Read (R) information from magnets and to Write (W) information onto magnets. Many other new phenomena are being investigated for nano-electronic memory as described in Part II of this book. It seems natural to ask whether these advances in memory devices could also translate into a new class of logic devices. What makes logic devices different from memory is the need for one device to drive another and this calls for gain, directionality and input-output isolation as exemplified by the transistor. With this in mind we will try to present our perspective on how W and R devices in general, spintronic or otherwise, could be integrated into transistor-like switches that can be interconnected to build complex circuits without external amplifiers or clocks. We will argue that the most common switch used to implement digital logic based on complementary metal oxide semiconductor (CMOS) transistors can be viewed as an integrated W-R unit having an input-output asymmetry that give it gain and directionality. Such a viewpoint is not intended to provide any insight into the operation of CMOS switches, but rather as an aid to understanding how W and R units based on spins and magnets can be combined to build transistor-like switches. Next we will discuss the standard W and R units used for magnetic memory devices and present one way to integrate them into a single unit with the input electrically isolated from the output. But we argue that this integrated W-R unit would not provide the key property of gain. We will then show that the recently discovered giant spin Hall effect could be used to construct a W-R unit with gain and suggest other possibilities for spin switches with gain.Comment: 27 pages. To appear in Emerging Nanoelectronic Devices, Editors: An Chen, James Hutchby, Victor Zhirnov and George Bourianoff, John Wiley & Sons (to be published

Spiking Neural Networks for Inference and Learning: A Memristor-based Design Perspective

On metrics of density and power efficiency, neuromorphic technologies have the potential to surpass mainstream computing technologies in tasks where real-time functionality, adaptability, and autonomy are essential. While algorithmic advances in neuromorphic computing are proceeding successfully, the potential of memristors to improve neuromorphic computing have not yet born fruit, primarily because they are often used as a drop-in replacement to conventional memory. However, interdisciplinary approaches anchored in machine learning theory suggest that multifactor plasticity rules matching neural and synaptic dynamics to the device capabilities can take better advantage of memristor dynamics and its stochasticity. Furthermore, such plasticity rules generally show much higher performance than that of classical Spike Time Dependent Plasticity (STDP) rules. This chapter reviews the recent development in learning with spiking neural network models and their possible implementation with memristor-based hardware

The Translocal Event and the Polyrhythmic Diagram

This thesis identifies and analyses the key creative protocols in translocal performance practice, and ends with suggestions for new forms of transversal live and mediated performance practice, informed by theory. It argues that ontologies of emergence in dynamic systems nourish contemporary practice in the digital arts. Feedback in self-organised, recursive systems and organisms elicit change, and change transforms. The arguments trace concepts from chaos and complexity theory to virtual multiplicity, relationality, intuition and individuation (in the work of Bergson, Deleuze, Guattari, Simondon, Massumi, and other process theorists). It then examines the intersection of methodologies in philosophy, science and art and the radical contingencies implicit in the technicity of real-time, collaborative composition. Simultaneous forces or tendencies such as perception/memory, content/ expression and instinct/intellect produce composites (experience, meaning, and intuition- respectively) that affect the sensation of interplay. The translocal event is itself a diagram - an interstice between the forces of the local and the global, between the tendencies of the individual and the collective. The translocal is a point of reference for exploring the distribution of affect, parameters of control and emergent aesthetics. Translocal interplay, enabled by digital technologies and network protocols, is ontogenetic and autopoietic; diagrammatic and synaesthetic; intuitive and transductive. KeyWorx is a software application developed for realtime, distributed, multimodal media processing. As a technological tool created by artists, KeyWorx supports this intuitive type of creative experience: a real-time, translocal “jamming” that transduces the lived experience of a “biogram,” a synaesthetic hinge-dimension. The emerging aesthetics are processual – intuitive, diagrammatic and transversal

Energy challenges for ICT

The energy consumption from the expanding use of information and communications technology (ICT) is unsustainable with present drivers, and it will impact heavily on the future climate change. However, ICT devices have the potential to contribute signi - cantly to the reduction of CO2 emission and enhance resource e ciency in other sectors, e.g., transportation (through intelligent transportation and advanced driver assistance systems and self-driving vehicles), heating (through smart building control), and manu- facturing (through digital automation based on smart autonomous sensors). To address the energy sustainability of ICT and capture the full potential of ICT in resource e - ciency, a multidisciplinary ICT-energy community needs to be brought together cover- ing devices, microarchitectures, ultra large-scale integration (ULSI), high-performance computing (HPC), energy harvesting, energy storage, system design, embedded sys- tems, e cient electronics, static analysis, and computation. In this chapter, we introduce challenges and opportunities in this emerging eld and a common framework to strive towards energy-sustainable ICT

Language sample analysis for Spanish speakers

textThe purpose of this project was to develop a Spanish language sample analysis (LSA) scoring procedure for English-Spanish bilinguals used to guide clinicians in developing language goals and monitoring progress on those goals. A Spanish LSA procedure was created and was tested on 20 typically developing and 16 language impaired English-Spanish bilinguals. Each utterance of each language sample was analyzed for correct and attempted use of the 20 grammatical forms selected for the LSA procedure. Based on the results, a preliminary profile of impairment was established. It showed that Relative Clauses, Infinitive Clauses, Present Subjunctive, Third Person Plural Present and Preterit Indicative, Irregular Preterit Indicative, Indirect and Direct Object Clitics, Imperfect, and Plural Nouns were the most problematic forms for English-Spanish bilinguals with LI. Clinical implications of these findings are discussed.Communication Sciences and Disorder

Team Learning: A Theoretical Integration and Review

With the increasing emphasis on work teams as the primary architecture of organizational structure, scholars have begun to focus attention on team learning, the processes that support it, and the important outcomes that depend on it. Although the literature addressing learning in teams is broad, it is also messy and fraught with conceptual confusion. This chapter presents a theoretical integration and review. The goal is to organize theory and research on team learning, identify actionable frameworks and findings, and emphasize promising targets for future research. We emphasize three theoretical foci in our examination of team learning, treating it as multilevel (individual and team, not individual or team), dynamic (iterative and progressive; a process not an outcome), and emergent (outcomes of team learning can manifest in different ways over time). The integrative theoretical heuristic distinguishes team learning process theories, supporting emergent states, team knowledge representations, and respective influences on team performance and effectiveness. Promising directions for theory development and research are discussed

Multi-port Memory Design for Advanced Computer Architectures

In this thesis, we describe and evaluate novel memory designs for multi-port on-chip and off-chip use in advanced computer architectures. We focus on combining multi-porting and evaluating the performance over a range of design parameters. Multi-porting is essential for caches and shared-data systems, especially multi-core System-on-chips (SOC). It can significantly increase the memory access throughput. We evaluate FinFET voltage-mode multi-port SRAM cells using different metrics including leakage current, static noise margin and read/write performance. Simulation results show that single-ended multi-port FinFET SRAMs with isolated read ports offer improved read stability and flexibility over classical double-ended structures at the expense of write performance. By increasing the size of the access transistors, we show that the single-ended multi-port structures can achieve equivalent write performance to the classical double-ended multi-port structure for 9% area overhead. Moreover, compared with CMOS SRAM, FinFET SRAM has better stability and standby power. We also describe new methods for the design of FinFET current-mode multi-port SRAM cells. Current-mode SRAMs avoid the full-swing of the bitline, reducing dynamic power and access time. However, that comes at the cost of voltage drop, which compromises stability. The design proposed in this thesis utilizes the feature of Independent Gate (IG) mode FinFET, which can leverage threshold voltage by controlling the back gate voltage, to merge two transistors into one through high-Vt and low-Vt transistors. This design not only reduces the voltage drop, but it also reduces the area in multi-port current-mode SRAM design. For off-chip memory, we propose a novel two-port 1-read, 1-write (1R1W) phasechange memory (PCM) cell, which significantly reduces the probability of blocking at the bank levels. Different from the traditional PCM cell, the access transistors are at the top and connected to the bitline. We use Verilog-A to model the behavior of Ge2Sb2Te5 (GST: the storage component). We evaluate the performance of the two-port cell by transistor sizing and voltage pumping. Simulation results show that pMOS transistor is more practical than nMOS transistor as the access device when both area and power are considered. The estimated area overhead is 1.7�, compared to single-port PCM cell. In brief, the contribution we make in this thesis is that we propose and evaluate three different kinds of multi-port memories that are favorable for advanced computer architectures

Consciosusness in Cognitive Architectures. A Principled Analysis of RCS, Soar and ACT-R

This report analyses the aplicability of the principles of consciousness developed in the ASys project to three of the most relevant cognitive architectures. This is done in relation to their aplicability to build integrated control systems and studying their support for general mechanisms of real-time consciousness.\ud To analyse these architectures the ASys Framework is employed. This is a conceptual framework based on an extension for cognitive autonomous systems of the General Systems Theory (GST).\ud A general qualitative evaluation criteria for cognitive architectures is established based upon: a) requirements for a cognitive architecture, b) the theoretical framework based on the GST and c) core design principles for integrated cognitive conscious control systems