RF Power Amplifier and Its Envelope Tracking

This dissertation introduces an agile supply modulator with optimal transient performance for the envelope tracking supply in linear power amplifiers. For this purpose, an on-demand current source module, the bang-bang transient performance enhancer (BBTPE), is proposed. Its objective is to follow fast variations in input signals with reduced overshoot and settling time without deteriorating the steady-state performance of the buck regulator. The proposed approach enables fast system response through the BBTPE and an accurate steady-state output response through a low switching ripple and power efficient dynamic buck regulator. Fast output response with the help of the added module induces a slower rise of inductor current in the buck converter that further assists the proposed system to reduce both overshoot and settling time. To demonstrate the feasibility of the proposed solution, extensive simulations and experimental results from a discrete system are reported. The proposed supply modulator shows 80% improvement in rise time along with 60% reduction in both overshoot and settling time compared to the conventional dynamic buck regulator-based solution. Experimental results for a PA using the LTE 16-QAM 5 MHz standard shows improvement of 7.68 dB and 65.1% in ACPR and EVM, respectively. In a polar power amplifier, the input signal splits into phase and amplitude components using a non-linear conversion operation. This operation broadens the spectrum of the polar signal components. The information of amplitude and phase contains spectral images due to the sampling operation in non-linear conversion operation. These spectral images can be large and cause out-of-band emission in the output spectrum. In addition, during the recombination process of phase and amplitude, a delay mismatch between amplitude and phase signals, which can occur due to separate processing paths of amplitude and phase signals, causes out-of-band emissions, also known as spectral regrowth. This dissertation presents solutions to both of the issues of digital polar power amplifier: spectral images and delay mismatch. In order to reduce the problem of spectral images, interpolation of phase and amplitude is proposed in this work. This increases the effective sampling frequency of the amplitude and phase, which helps to improve the linearity by around 10 dB. In addition, a novel calibration scheme is proposed here for the delay mismatch between phase and amplitude path in a digital polar power amplifier. The scheme significantly reduces the spectral regrowth. The scheme uses the same path for phase and amplitude delay calculation after the recombination that allows having a robust calibration. Furthermore, it can be executed during the empty transmission slots. The proposed scheme is designed in a 40 nm CMOS technology and simulated with a 64-QAM IEEE 802.11n wireless standard. The scheme achieved 7.57 dB enhancement in ACLR and 84.35% improvement in EVM for a 3.5 ns mismatch in phase and amplitude path

TRANSMISSION PERFORMANCE OPTIMIZATION IN FIBER-WIRELESS ACCESS NETWORKS USING MACHINE LEARNING TECHNIQUES

The objective of this dissertation is to enhance the transmission performance in the fiber-wireless access network through mitigating the vital system limitations of both analog radio over fiber (A-RoF) and digital radio over fiber (D-RoF), with machine learning techniques being systematically implemented. The first thrust is improving the spectral efficiency for the optical transmission in the D-RoF to support the delivery of the massive number of bits from digitized radio signals. Advanced digital modulation schemes like PAM8, discrete multi-tone (DMT), and probabilistic shaping are investigated and implemented, while they may introduce severe nonlinear impairments on the low-cost optical intensity-modulation-direct-detection (IMDD) based D-RoF link with a limited dynamic range. An efficient deep neural network (DNN) equalizer/decoder to mitigate the nonlinear degradation is therefore designed and experimentally verified. Besides, we design a neural network based digital predistortion (DPD) to mitigate the nonlinear impairments from the whole link, which can be integrated into a transmitter with more processing resources and power than a receiver in an access network. Another thrust is to proactively mitigate the complex interferences in radio access networks (RANs). The composition of signals from different licensed systems and unlicensed transmitters creates an unprecedently complex interference environment that cannot be solved by conventional pre-defined network planning. In response to the challenges, a proactive interference avoidance scheme using reinforcement learning is proposed and experimentally verified in a mmWave-over-fiber platform. Except for the external sources, the interference may arise internally from a local transmitter as the self-interference (SI) that occupies the same time and frequency block as the signal of interest (SOI). Different from the conventional subtraction-based SI cancellation scheme, we design an efficient dual-inputs DNN (DI-DNN) based canceller which simultaneously cancels the SI and recovers the SOI.Ph.D

Digital Linearization of High Capacity and Spectrally Efficient Direct Detection Optical Transceivers

Metropolitan area networks are experiencing unprecedented traffic growth. The provision of information and entertainment supported by cloud services, broadband video and mobile technologies such as long-term evolution (LTE) and 5G are creating a rapidly increasing demand for bandwidth. Although wavelength division multiplexing (WDM) architectures have been introduced into metro transport networks to provide significant savings over single-channel systems, to cope with the ever-increasing traffic growth, it is urgently required to deploy higher data rates (100 Gb/s and beyond) for each WDM channel. In comparison to dual-polarization digital coherent transceivers, single-polarization and single photodiode-based direct-detection (DD) transceivers may be favourable for metropolitan, inter-data centre and access applications due to their use of a simple and low-cost optical hardware structure. Single sideband (SSB) quadrature amplitude modulation (QAM) subcarrier modulation (SCM) is a promising signal format to achieve high information spectral density (ISD). However, due to the nonlinear effect termed signal-signal beat interference (SSBI) caused by the square-law detection, the performance of such SSB SCM DD systems is severely degraded. Therefore, it is essential to develop effective and low-complexity linearization techniques to eliminate the SSBI penalty and improve the performance of such transceivers. Extensive studies on SSB SCM DD transceivers employing a number of novel digital linearization techniques to support high capacity (≥ 100 Gb/s per channel) and spectrally-efficient (net ISD > 2 b/s/Hz) WDM transmission covering metropolitan reach scenarios (up to 240 km) are described in detail in this thesis. Digital modulation formats that can be used in DD links and the corresponding transceiver configurations are firstly reviewed, from which the SSB SCM signalling format is identified as the most promising format to achieve high data rates and ISDs. Following this, technical details of the digital linearization approaches (iterative SSBI cancellation, single-stage linearization filter and simplified non-iterative SSBI cancellation, two-stage linearization filter, Kramers-Kronig scheme) considered in the thesis are presented. Their compensation performance in a dispersion pre-compensated (Tx-EDC) 112 Gb/s per channel 35 GHz-spaced WDM SSB 16-QAM Nyquist-SCM DD system transmitting over up to 240 km standard single-mode fibre (SSMF) is assessed. Net ISDs of up to 3.18 b/s/Hz are achieved. Moreover, we also show that, with the use of effective digital linearization techniques, further simplification of the DD transceivers can be realized by moving electronic dispersion compensation from the transmitter to the receiver without sacrificing performance. The optical ISD limit of SSB SCM DD system finally explored through experiments with higher-order modulation formats combined with effective digital linearization techniques. 168 Gb/s per channel WDM 64-QAM signals were successfully transmitted over 80 km, achieving a record net optical ISD of 4.54 b/s/Hz. Finally, areas for further research are identified

Nonlinear impairments and mitigation technologies for the next generation fiber-wireless mobile fronthaul networks

The proliferation of Internet-connected mobile devices and video-intensive services are driving the growth of mobile data traffic in an explosive way. The last mile of access networks, mobile fronthaul (MFH) networks, have become the data rate bottleneck of user experience. The objective of this research are two-fold. For analog MFH, nonlinear interferences among multiple bands of mobile signals in a multi-RAT multi-service radio-over-fiber (RoF)-based MFH system are investigated for the first time. The nonlinear impairments of both single-carrier and multi-carrier signals are investigated, and it is experimentally demonstrated that inter-channel interferences play a more important role in the performance degradation of analog MFH than the nonlinear distortions of each individual signal. A digital predistortion technique was also presented to linearize the analog MFH links. On the other hand, for digital MFH, we experimentally demonstrate a novel digitization interface based on delta-sigma modulation to replace the state-of-the-art common public radio interface (CPRI). Compared with CPRI, it provides improved spectral efficiency and enhanced fronthaul capacity, and can accommodate both 4G-LTE and 5G mobile services.Ph.D

Development of Robust Analog and Mixed-Signal Circuits in the Presence of Process- Voltage-Temperature Variations

Continued improvements of transceiver systems-on-a-chip play a key role in the advancement of mobile telecommunication products as well as wireless systems in biomedical and remote sensing applications. This dissertation addresses the problems of escalating CMOS process variability and system complexity that diminish the reliability and testability of integrated systems, especially relating to the analog and mixed-signal blocks. The proposed design techniques and circuit-level attributes are aligned with current built-in testing and self-calibration trends for integrated transceivers. In this work, the main focus is on enhancing the performances of analog and mixed-signal blocks with digitally adjustable elements as well as with automatic analog tuning circuits, which are experimentally applied to conventional blocks in the receiver path in order to demonstrate the concepts. The use of digitally controllable elements to compensate for variations is exemplified with two circuits. First, a distortion cancellation method for baseband operational transconductance amplifiers is proposed that enables a third-order intermodulation (IM3) improvement of up to 22dB. Fabricated in a 0.13µm CMOS process with 1.2V supply, a transconductance-capacitor lowpass filter with the linearized amplifiers has a measured IM3 below -70dB (with 0.2V peak-to-peak input signal) and 54.5dB dynamic range over its 195MHz bandwidth. The second circuit is a 3-bit two-step quantizer with adjustable reference levels, which was designed and fabricated in 0.18µm CMOS technology as part of a continuous-time SigmaDelta analog-to-digital converter system. With 5mV resolution at a 400MHz sampling frequency, the quantizer's static power dissipation is 24mW and its die area is 0.4mm^2. An alternative to electrical power detectors is introduced by outlining a strategy for built-in testing of analog circuits with on-chip temperature sensors. Comparisons of an amplifier's measurement results at 1GHz with the measured DC voltage output of an on-chip temperature sensor show that the amplifier's power dissipation can be monitored and its 1-dB compression point can be estimated with less than 1dB error. The sensor has a tunable sensitivity up to 200mV/mW, a power detection range measured up to 16mW, and it occupies a die area of 0.012mm^2 in standard 0.18µm CMOS technology. Finally, an analog calibration technique is discussed to lessen the mismatch between transistors in the differential high-frequency signal path of analog CMOS circuits. The proposed methodology involves auxiliary transistors that sense the existing mismatch as part of a feedback loop for error minimization. It was assessed by performing statistical Monte Carlo simulations of a differential amplifier and a double-balanced mixer designed in CMOS technologies