Channel Estimation and Uplink Achievable Rates in One-Bit Massive MIMO Systems

This paper considers channel estimation and achievable rates for the uplink of a massive multiple-input multiple-output (MIMO) system where the base station is equipped with one-bit analog-to-digital converters (ADCs). By rewriting the nonlinear one-bit quantization using a linear expression, we first derive a simple and insightful expression for the linear minimum mean-square-error (LMMSE) channel estimator. Then employing this channel estimator, we derive a closed-form expression for the lower bound of the achievable rate for the maximum ratio combiner (MRC) receiver. Numerical results are presented to verify our analysis and show that our proposed LMMSE channel estimator outperforms the near maximum likelihood (nML) estimator proposed previously.Comment: 5 pages, 2 figures, the Ninth IEEE Sensor Array and Multichannel Signal Processing Worksho

Massive MIMO with Non-Ideal Arbitrary Arrays: Hardware Scaling Laws and Circuit-Aware Design

Massive multiple-input multiple-output (MIMO) systems are cellular networks where the base stations (BSs) are equipped with unconventionally many antennas, deployed on co-located or distributed arrays. Huge spatial degrees-of-freedom are achieved by coherent processing over these massive arrays, which provide strong signal gains, resilience to imperfect channel knowledge, and low interference. This comes at the price of more infrastructure; the hardware cost and circuit power consumption scale linearly/affinely with the number of BS antennas $N$. Hence, the key to cost-efficient deployment of large arrays is low-cost antenna branches with low circuit power, in contrast to today's conventional expensive and power-hungry BS antenna branches. Such low-cost transceivers are prone to hardware imperfections, but it has been conjectured that the huge degrees-of-freedom would bring robustness to such imperfections. We prove this claim for a generalized uplink system with multiplicative phase-drifts, additive distortion noise, and noise amplification. Specifically, we derive closed-form expressions for the user rates and a scaling law that shows how fast the hardware imperfections can increase with $N$ while maintaining high rates. The connection between this scaling law and the power consumption of different transceiver circuits is rigorously exemplified. This reveals that one can make the circuit power increase as $\sqrt{N}$, instead of linearly, by careful circuit-aware system design.Comment: Accepted for publication in IEEE Transactions on Wireless Communications, 16 pages, 8 figures. The results can be reproduced using the following Matlab code: https://github.com/emilbjornson/hardware-scaling-law