972 research outputs found

    RowPress: Amplifying Read Disturbance in Modern DRAM Chips

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    Memory isolation is critical for system reliability, security, and safety. Unfortunately, read disturbance can break memory isolation in modern DRAM chips. For example, RowHammer is a well-studied read-disturb phenomenon where repeatedly opening and closing (i.e., hammering) a DRAM row many times causes bitflips in physically nearby rows. This paper experimentally demonstrates and analyzes another widespread read-disturb phenomenon, RowPress, in real DDR4 DRAM chips. RowPress breaks memory isolation by keeping a DRAM row open for a long period of time, which disturbs physically nearby rows enough to cause bitflips. We show that RowPress amplifies DRAM's vulnerability to read-disturb attacks by significantly reducing the number of row activations needed to induce a bitflip by one to two orders of magnitude under realistic conditions. In extreme cases, RowPress induces bitflips in a DRAM row when an adjacent row is activated only once. Our detailed characterization of 164 real DDR4 DRAM chips shows that RowPress 1) affects chips from all three major DRAM manufacturers, 2) gets worse as DRAM technology scales down to smaller node sizes, and 3) affects a different set of DRAM cells from RowHammer and behaves differently from RowHammer as temperature and access pattern changes. We demonstrate in a real DDR4-based system with RowHammer protection that 1) a user-level program induces bitflips by leveraging RowPress while conventional RowHammer cannot do so, and 2) a memory controller that adaptively keeps the DRAM row open for a longer period of time based on access pattern can facilitate RowPress-based attacks. To prevent bitflips due to RowPress, we describe and evaluate a new methodology that adapts existing RowHammer mitigation techniques to also mitigate RowPress with low additional performance overhead. We open source all our code and data to facilitate future research on RowPress.Comment: Extended version of the paper "RowPress: Amplifying Read Disturbance in Modern DRAM Chips" at the 50th Annual International Symposium on Computer Architecture (ISCA), 202

    Ecolabelling. Criteria development for rechargeable batteries in ICT products

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    This research puts together two massive areas: voluntary certification programmes, specifically Type I ecolabelling (ISO 14024), aimed to incentivise and assist in providing customers with sustainable in all meanings products; and rechargeable batteries – inalienable element of portable electronic products. Moreover, the importance of batteries lifts up to an absolutely new level – with a rapid development of electric vehicles and energy storage systems, often used to accumulate energy from renewable energy sources. Mass application of rechargeable batteries in consumer electronic products, first of all, increases the number of batteries on the market, and, thus, the battery waste stream. Secondly, this encourages producers to search for new chemical compounds for the creation of batteries with the increased energy density and faster recharge time. Upcoming revision of the Battery Directive; application of new chemical compounds in cathodes production; potential risks associated with supply of such resources as cobalt and lithium; increased waste battery stream; the End-of-Life management; reaching higher rates for collection, sorting, and recycling of waste batteries; arising social conflicts around certain materials; product redesign and the necessity to be in compliance with the waste management hierarchy. All the listed aspects and challenges create a predisposition for Type I ecolabelling – to face these challenges and, thereby, to reconsider existing requirements to rechargeable batteries, initiating positive changes. This research aims to define new potential aspects and to improve existing criteria for rechargeable batteries in portable ICT products – to meet arising environmental and social challenges, related to all life cycle stages of rechargeable batteries. To achieve this, the author conducted a research, observing background on battery technologies and the battery market; current requirements of Type I ecolabelling programmes to both – ICT products equipped with rechargeable batteries, and rechargeable batteries themselves. Numerous stakeholders, from electronics producers, waste battery collectors, and recyclers – to battery specialists and certification programmes, contributed with their view on rechargeable batteries. The outcome of the research is the list of potential aspects of rechargeable batteries to be considered by Type I ecolabelling programmes for further implementation in the standards for mobile phones; tablets, laptops and notebook computers

    NASA SBIR abstracts of 1991 phase 1 projects

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    The objectives of 301 projects placed under contract by the Small Business Innovation Research (SBIR) program of the National Aeronautics and Space Administration (NASA) are described. These projects were selected competitively from among proposals submitted to NASA in response to the 1991 SBIR Program Solicitation. The basic document consists of edited, non-proprietary abstracts of the winning proposals submitted by small businesses. The abstracts are presented under the 15 technical topics within which Phase 1 proposals were solicited. Each project was assigned a sequential identifying number from 001 to 301, in order of its appearance in the body of the report. Appendixes to provide additional information about the SBIR program and permit cross-reference of the 1991 Phase 1 projects by company name, location by state, principal investigator, NASA Field Center responsible for management of each project, and NASA contract number are included

    Scan-Chain Intra-Cell Aware Testing

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    This paper first presents an evaluation of the effectiveness of different test pattern sets in terms of ability to detect possible intra-cell defects affecting the scan flip-flops. The analysis is then used to develop an effective test solution to improve the overall test quality. As a major result, the paper demonstrates that by combining test vectors generated by a commercial ATPG to detect stuck-at and delay faults, plus a fragment of extra test patterns generated to specifically target the escaped defects, we can obtain a higher intra-cell defect coverage (i.e., 6.46% on average) and a shorter test time (i.e., 42.20% on average) than by straightforwardly using an ATPG which directly targets these defects

    NASA Tech Briefs, June 1990

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    Topics: New Product Ideas; NASA TU Services; Electronic Components and Circuits; Electronic Systems; Physical Sciences; Materials; Computer Programs; Mechanics; Machinery; Fabrication Technology; Mathematics and Information Sciences; Life Sciences

    Energy autonomous systems : future trends in devices, technology, and systems

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    The rapid evolution of electronic devices since the beginning of the nanoelectronics era has brought about exceptional computational power in an ever shrinking system footprint. This has enabled among others the wealth of nomadic battery powered wireless systems (smart phones, mp3 players, GPS, …) that society currently enjoys. Emerging integration technologies enabling even smaller volumes and the associated increased functional density may bring about a new revolution in systems targeting wearable healthcare, wellness, lifestyle and industrial monitoring applications

    An Examination of System Architectures for Distributing Sensor Data Via Ethernet Networks

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    Comparing the Performance of Julia on CPUs versus GPUs and Julia-MPI versus Fortran-MPI: a case study with MPAS-Ocean (Version 7.1)

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    Some programming languages are easy to develop at the cost of slow execution, while others are fast at runtime but much more difficult to write. Julia is a programming language that aims to be the best of both worlds – a development and production language at the same time. To test Julia's utility in scientific high-performance computing (HPC), we built an unstructured-mesh shallow water model in Julia and compared it against an established Fortran-MPI ocean model, the Model for Prediction Across Scales–Ocean (MPAS-Ocean), as well as a Python shallow water code. Three versions of the Julia shallow water code were created: for single-core CPU, graphics processing unit (GPU), and Message Passing Interface (MPI) CPU clusters. Comparing identical simulations revealed that our first version of the Julia model was 13 times faster than Python using NumPy, where both used an unthreaded single-core CPU. Further Julia optimizations, including static typing and removing implicit memory allocations, provided an additional 10–20× speed-up of the single-core CPU Julia model. The GPU-accelerated Julia code was almost identical in terms of performance to the MPI parallelized code on 64 processes, an unexpected result for such different architectures. Parallelized Julia-MPI performance was identical to Fortran-MPI MPAS-Ocean for low processor counts and ranges from 2× faster to 2× slower for higher processor counts. Our experience is that Julia development is fast and convenient for prototyping but that Julia requires further investment and expertise to be competitive with compiled codes. We provide advice on Julia code optimization for HPC systems.</p

    NASA Tech Briefs, October 2001

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    Topics include: special coverage section on composites and plastics, electronic components and systems, software, mechanics, physical sciences, information sciences, book and reports, and a special sections of Photonics Tech Briefs and Motion Control Tech Briefs
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