Integrated Photodiodes in Standard CMOS Technology for CD and DVD Applications

The influence of two different geometries (layouts) and two structures of high-speed photodiodes in fully standard 0.18 /spl mu/m CMOS technology on their intrinsic (physical) and electrical bandwidths is analyzed. In addition, a possible application of the integrated photodiodes for the CD and DVD optical pick-up units is discussed. Two photodiode structures with a highest responsivity are studied: nwell/p-substrate and p+/nwell/p-substrate (double photodiode). The photodiode bandwidths are compared for /spl lambda/=780 nm and /spl lambda/=650 nm wavelength, corresponding to the lasers for CD and DVD, respectively. Slow substrate current component limits the intrinsic bandwidth of nwell/p-substrate and p+/nwell/p-substrate photodiodes to 6MHz and 7MHz, for a CD application as well as 70MHz and 100MHz for a DVD application. The electrical bandwidth of these diodes in combination with typical transimpedance amplifiers, will be always larger than the calculated intrinsic bandwidths meaning that the diode capacitance is not critical in total photoreceiver design

Design of Multi Gb/s Monolithically Integrated Photodiodes and Multi-Stage Transimpedance Amplifiers in Thin-Film SOI CMOS Technology

The development of new integrated high-speed Si receivers is requested for short distance optical data link and emerging optical storage (OS) systems, notably for the Gb/s Ethernet standard [1] - [8] and Blue DVD (Blu-Ray, HDDVD) [3], [4], [9]. As requirements on bandwidth, gain, power consumption as well as low read-out noise and cost are quite severe, an optimal design strategy of a monolithically integrated solution, i.e. with on-chip photodetector and transimpedance amplifier (TIA), is required. In optical communication, however, non integrated detectors are usually employed [2] - [8] since the particular indirect energy band properties of Silicon make this semiconductor not very efficient for optical reception at 850nm wavelength. As Si is the most widely used and low cost semiconductor material in electronics and due to the availability of low-cost 850nm transmitters, there is yet a great interest and challenge to integrate such receivers. 1 to 10 Gb/s, high sensitivity and low complexity, low-cost silicon photodetectors for the monolithic integration of optical receivers for short distance applications at 850nm are really an issue as the Si absorption thickness required for high-speed (low transit time and low capacitance) favors thin-film technologies for which the responsivity is low. Some solutions exist but at the price of more costly and complex fabrication processes [10-16]. At the system level, owing to its low dark current (pA range) [17], low capacitor (10fF) for the photodetector [1] and possibility to integrate this detector with high-performance low-capacitance transistors, global thin-film SOI monolithically integrated photoreceivers have potentially higher gain and lower noise performances which in turn, as we will show here, can increase the C-sensitivity and alleviate this requirement on the photodetector itself. Furthermore only SOI photodiodes have so far achieved bandwidth compatible with the 10Gb/s specification and even higher data rate among the "easy to integrate" Si photodetectors [1], [15], [16] and [18]. In the blue and UV wavelengths, these diodes achieve a high responsivity [17] and then combine all the advantages of high speed, low dark current and finally high sensitivity [1]. This makes SOI receivers the best candidate for blue DVD applications and future optical storage generation. This also suggests that blue wavelength for multi Gb/s short reach optical communication could be used in a near future under the condition that the recent progresses in blue emitting sources make them available [17, 19]. We present here a top-down design methodology, fully validated by Eldo circuit simulations [20] and experimental measurements, which allows to predict and optimize, starting from the speed requirements and the technological parameters, the architecture and performances of the receiver. Our approach generalizes the one proposed in [21] to all inversion regimes. In addition our design strategy is based on the gm id methodology [22] and allows one to optimize the diode and the transimpedance in a simultaneous way. Thanks to this modeling and the low capacitance of thin-film integrated SOI photodiodes, we have optimized various monolithic optical front-end suitable for 1 to 10 Gb/s short distance communication or Blue DVD applications that show the potentials of 0.13μm Partially-Depleted (PD) SOI CMOS implementation in terms of gain, sensitivity, power consumption, area and noise. In section 2 (Optical Receivers Basics), the simple resistor system is first presented as well as its limitations. The transimpedance amplifier is then introduced and its basic theory and concepts such as transimpedance gain, bandwidth and stability are derived. Important parameters to compare transimpedance amplifiers are also discussed as well as architectures most often used in the high speed communication area. Then in section "Design of Multistage Transimpedance Amplifiers", we present our top-down methodology to design transimpedance amplifiers in the case where the voltage gain of the voltage amplifier used in the TIA is independent of the feedback resistor Rf. This is usually the case when the TIA bandwidth is not too close to the transistors frequency limit ft of a given technology and leads to a multi-stage approach. Our design procedure is then applied to the design of a 3 stages 1GHz bandwidth transimpedance amplifier in a 0.13 μm PD-SOI CMOS technology. Finally, in section "Single stage Transimpedance Amplifier Modeling", we present a top-down methodology to design transimpedance amplifiers when the voltage gain depends on Rf. This is the case for very high-speed singlestage transimpedance amplifiers. Our design procedure is then applied to the design of a single stage 10GHz bandwidth transimpedance amplifier in a 0.13 μm PD-SOI CMOS technology and to the design of a 1GHz bandwidth single stage TIA in a 0.5 μm FD-SOI CMOS technology

Performance Evaluation of an Integrated Optoelectronic Receiver

AbstractThis work describes the optical and electrical characterization of an integrated optoelectronic receiver. The receiver is composed of a photodiode and a transimpedance amplifier, both fabricated in silicon technology using a 0.8μm BiCMOS process. The total area occupied by the photodiode is of 10,000μm2. In a first step, the generated photocurrent of the photodiode is measured for the wavelengths of 780nm and 830nm at different levels of optical power. In a second step, the responsivity and quantum efficiency parameters of the photodiode are computed. Finally, an electrical measurement including the transimpedance amplifier is achieved. A potential application for this optoelectronic receiver is on the first optical communications window

Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers

A dissertation presented on the characterization and optimization of avalanche photodiodes fabricated by standard CMOS process (CMOS-APD) for high-speed photoreceivers, beginning with the theory and principle related to photodetector and avalanche photodiodes, followed by characterization,optimization, and wavelength dependence of CMOS-APD, and finally link up with the transimpedance amplifier. nMOS-type and pMOS-type silicon avalanche photodiodes were fabricated by standard 0.18 μm CMOS process, and the currentvoltage characteristic and the frequency response of the CMOS-APDs with and without the guard ring structure were measured. CMOS-APDs have features of high avalanche gain below 10 V, wide bandwidth over 5 GHz, and easy integration with electronic circuits. In CMOS-APDs, guard ring structure is introduced for high-speed operation with the role of elimination the slow photo generated carriers in a deep layer and a substrate. The bandwidth of the CMOS-APD is enhanced with the guard ring structure at a sacrifice of the responsivity. Based on comparison of nMOS-type and pMOS-type APDs, the nMOS-type APD is more suitable for high-speed operation. The bandwidth is enhanced with decreasing the spacing of interdigital electrodes due to decreased carrier transit time and with decreasing the detection area and the PAD size for RF probing due to decreased device capacitance. Thus, an nMOS-type APD with the electrode spacing of 0.84 μm, the detection area of 10 x 10 μm², the PAD size for RF probing of 30 x 30 μm² along with the guard ring structure was fabricated. As a results, the maximum bandwidth of 8.4 GHz at the avalanche gain of about 10 and the gain-bandwidth product of 280 GHz were achieved. Furthermore, the wavelength dependence of the responsivity and the bandwidth of the CMOS-APDs with and without the guard ring structure also revealed. At a wavelength of 520 nm or less, there is no difference in the responsivity and the frequency response because all the illuminated light is absorbed in the p+-layer and the Nwell due to strong light absorption of Si. On the other hand, a part of the incident light is absorbed in the Psubstrate and the photo-generated carriers in the P-substrate are eliminated by the guard ring structure for the wavelength longer than 520 nm, and then bandwidth was remarkably enhanced at the sacrifice of the responsivity. In addition, to achieve high-speed photoreceivers, two types of TIA which are common-source and regulated-cascode TIAs were simulated by utilizing the output of the CMOSAPDs.The figure of merits of gain-bandwidth product was used to find the ideal results of the transimpedance gain and bandwidth performance due to trade-offs between both of them. The common-source TIA produced the transimpedance gain of 22.17 dBΩ, the bandwidth of 21.21 GHz and the gain-bandwidth product of 470.23 THz × dBΩ. Besides that, the simulated results of the regulated-cascade TIA configuration demonstrate 79.45 dBΩ transimpedance gain, 10.64 GHz bandwidth, and 845.35 THz × dBΩ gain-bandwidth product. Both of these TIA results meet the target of this research and further encouraging this successful CMOS-APDs to realize high-speed photoreceivers

A 2.5 GHz Optoelectronic Amplifier in 0.18 m CMOS

The ever-growing need for high speed data transmission is driven by multimedia and telecommunication demands. Traditional metallic media, such as copper coaxial cable, prove to be a limiting factor for high speed communications. Fiber optic methods provide a feasible solution that lacks the limitations of metallic mediums, including low bandwidth, cross talk caused by magnetic induction, and susceptibility to static and RF interferences. The first scientists to work with fibers optics started in 1970. One of the early challenges they faced was to produce glass fiber that was pure enough to be equal in performance with copper based media. Since then, the technology has advanced tremendously in terms of performance, quality, and consistency. The advancement of fiber optic communication has met its limits, not in the purity of its fiber media used to guide the data-modulated light wave, but in the conversion back and forth between electric signals to light. A high speed optic receiver must be used to convert the incident light into electrical signals. This thesis describes the design of a 2.5 GHz Optoelectronic Amplifier, the front end of an optic receiver. The discussion includes a survey of feasible topologies and an assessment of circuit techniques to enhance performance. The amplifier was designed and realized in a TSMC 0.18 µm CMOS process

Design of 10 Gb/s burst-mode receivers for high-split extended reach PONs

The continuous stream of new applications for the internet, increases the need for higher access speed in the currently deployed communication networks. Most networks in use today still consist of twisted copper wires, inherited from the telephone network. The disadvantages of reusing the existing telephone network are twofold. Firstly, the bandwidth of twisted copper wires is limited and secondly, a large number of switches and routers are needed throughout the network leading to an excessive power consumption. The hybrid fiber coax network that reuses the television distribution network is not free from these drawbacks. The bandwidth is also limited and power hungry amplifiers are needed to bridge the distance to and from the user. The future of broadband access lies in optical fiber networks. The optical fiber has a virtually unlimited bandwidth and the lower attenuation leads to less switches and amplifiers in the network, reducing the power consumption of the complete infrastructure. This dissertation describes the design of a 10 Gb/s burst-mode receiver for high-split extended reach passive optical networks (PONs). The designed receiver incorporates two very advanced features. Firstly, the burst-mode receiver locks its gain setting within 6 ns avoiding packet loss due to gain switching during data payload reception. Secondly, the burst-mode receiver detects both burst start and burst end, making it the first burst-mode receiver of its kind to operate without any time critical signal requirements from outside the burst-mode receiver. The presented work covers the chip-level architecture study and design of a 10 Gb/s burst-mode transimpedance amplifier and a 10 Gb/s post-amplifier, which are the two most critical components of a burst-mode receiver