Low noise and low power ECG amplifier using cmos 0.13μm technology

Through the scaling down of modern VLSI technologies, the realization of CMOS based electrocardiogram (ECG) device becoming wearable to its user is possible. Yet, this transition introduces more constraints to its analog circuits. This is due to the measured electrical signal of ECG devices, or known as ECG signal possessed characteristics that are low in frequency (0.1 to 150Hz) and amplitude (<5mV), thus it lead to every ECG devices suffered from flicker noise for low frequency cardiac signal acquisition at the front-end of its sensor, 50 Hz power line electromagnetic interference, and the large unstable input offsets due to the improper attachment of electrode-skin interface. Therefore, to encounter this problem, the frontend of ECG devices, which is amplifier needed to be enhance so it able to accurately detect the ECG signals. Besides that, the amplifier must able to operate at low voltage and less power consumption so that it can be used in wearable device. In this work, a high performance CMOS amplifier for ECG sensors that improves the noise issue and suitable for low power wearable cardiac screening is designed. The designed circuit adopts the folded cascode topology to achieve high gain and less susceptible to noise. This work uses 0.13 μm CMOS process technology from Silterra and Mentor Graphics Pyxis as the design tool. This successfully achieve high CMRR which is 160dB. Besides that, this work also able to reduce the noise at the front-end amplifier system down to 1.28nV/√Hz. The power consumption of the designed amplifier is 3 μW, which is low and suitable to be implemented on design for wearable ECG devices

CMOS Hyperbolic Sine ELIN filters for low/audio frequency biomedical applications

Hyperbolic-Sine (Sinh) filters form a subclass of Externally-Linear-Internally-Non- Linear (ELIN) systems. They can handle large-signals in a low power environment under half the capacitor area required by the more popular ELIN Log-domain filters. Their inherent class-AB nature stems from the odd property of the sinh function at the heart of their companding operation. Despite this early realisation, the Sinh filtering paradigm has not attracted the interest it deserves to date probably due to its mathematical and circuit-level complexity. This Thesis presents an overview of the CMOS weak inversion Sinh filtering paradigm and explains how biomedical systems of low- to audio-frequency range could benefit from it. Its dual scope is to: consolidate the theory behind the synthesis and design of high order Sinh continuous–time filters and more importantly to confirm their micro-power consumption and 100+ dB of DR through measured results presented for the first time. Novel high order Sinh topologies are designed by means of a systematic mathematical framework introduced. They employ a recently proposed CMOS Sinh integrator comprising only p-type devices in its translinear loops. The performance of the high order topologies is evaluated both solely and in comparison with their Log domain counterparts. A 5th order Sinh Chebyshev low pass filter is compared head-to-head with a corresponding and also novel Log domain class-AB topology, confirming that Sinh filters constitute a solution of equally high DR (100+ dB) with half the capacitor area at the expense of higher complexity and power consumption. The theoretical findings are validated by means of measured results from an 8th order notch filter for 50/60Hz noise fabricated in a 0.35μm CMOS technology. Measured results confirm a DR of 102dB, a moderate SNR of ~60dB and 74μW power consumption from 2V power supply

Power Line Noise Suppression Using N-path Notch Filter in ECG Signal Acquisition

芝浦工業大学2020年

Increasing Signal to Noise Ratio and Minimising Artefacts in Biomedical Instrumentation Systems

The research work described in this thesis was concerned with finding a novel method of minimising motion artefacts in biomedical instrumentation systems. The proposed solution, an Analog Frontend (AFE), was designed to detect any vertical (Y-Plane) or horizontal (X-Plane) movement of the electrode using two strain gauges, which were separated by 90° and fitted onto the electrode. The detected motion was fed back to the system for the removal of any motion artefact. The research started by emphasising the importance of minimising motion artefacts from biomedical signals and explaining how important it is for a clinical misinterpretation of the results. Hence, various motion artefact minimisation techniques undertaken by other researchers in the field were reviewed. This study covered different sources of artefacts, including the 40kHz powerline interference (PLI), 50/60kHz common-mode noise, white noise, and motion artefacts. The system was fully developed and tested and was firstly simulated using MATLAB Simulink tools to prove the effectiveness of the system before starting the implementation and build phase in the lab. The AFE system successfully produced a clean output signal, achieving an average correlation coefficient of 0.995. Also, the system output had a 98% SNR similarity with the clean source signal. Further, the system was then built and tested in the lab and successfully minimised the motion artefacts, achieving an average correlation coefficient of 0.974. Additionally, the final output had a 97.8% SNR similarity with the clean source signal. A novel test rig was developed to test the system with strain gauges. The system was able to remove the detected signal from the test rig and had an average correlation coefficient of 0.957. Lastly, the final output had a 94.2% SNR similarity with the clean source signal

ULTRA LOW POWER CIRCUITS FOR WEARABLE BIOMEDICAL SENSORS

Ph.DDOCTOR OF PHILOSOPH

Um filtro Gm-C notch CMOS de baixa potência para alta rejeição de ruídos da rede elétrica para EEG com seletor de frequência de corte.

Sistemas de aquisição e processamento de sinais exigem constante desenvolvimento e pesquisa com o avanço da tecnologia, a fim de diminuir área e consumo de energia dos circuitos. O filtro, elemento essencial em sistemas de aquisição e processamento, deve ser capaz de atenuar sinais indesejados e permitir a passagem livre dos sinais de interesse, com um cuidado ainda maior quando se trata de aplicações médicas. Neste trabalho, é proposto um filtro CMOS notch elíptico G-C de 5ª ordem para rejeição de ruídos provenientes da rede elétrica em aplicações de eletroencefalograma. O circuito é desenvolvido em tecnologia CMOS 130 nm, alimentado por uma fonte de 1,0 V, e possui um circuito de capacitância programável capaz de chavear entre eliminar ruídos de 50 ou 60 Hz. Foram realizadas simulações no ambiente CADENCE (Virtuoso Analog Design Environment L Editing), apresentando atenuação superior a 90 dB para as frequências de interesse, consumo abaixo de 600 nW e área de 879,2 m², mostrando que o circuito é capaz de filtrar os ruídos dos sinais de EEG, além de operar com baixa potência, permitindo utilização em aplicações portáteis

MR-compatible Electrophysiology Recording System for Multimodal Imaging

Simultaneous acquisition of functional magnetic resonance imaging (fMRI) and electrophysiological recordings is an emerging multimodal neuroimaging strategy for studying brain functions. However, the strong magnetic field generated during fMRI greatly degrades the electrophysiological signal quality during simultaneous acquisition. Here, I developed a low powered, miniaturized, system – “ECHO” which delivers a hardware and software solution to overcome the challenges presented by multimodal imaging. The device monitors fluctuations in electromagnetic field during fMRI and synchronizes amplification and sampling of electrophysiological signals to minimize effects of gradient and RF artifacts (electromagnetic artifacts). Furthermore, I introduced a concept of wirelessly transmitting recorded data through the MRI receiver coil. ECHO transmits the data at a frequency visible to the MRI receiver coil, after which the transmitted data is readily separable from the MRI image in the frequency domain. The MR-compatibility of the recorder was evaluated through a series of experiments with a phantom to study its effects on the MRI image quality. To further evaluate the effectiveness of ECHO, I recorded electrocardiogram and local field potential (evoked potential) in live rats during concurrent fMRI acquisition. In summary, ECHO offers a ‘plug and play’ solution to capture artifact-free electrophysiological data without the need of expensive amplifiers or synchronization hardware which require physical connection to the MRI scanner. This device is expected to make multimodal imaging more accessible and be applied for a broad range of fMRI studies in both the research and clinical fields

Current efficient integrated architecture for common mode rejection sensitive neural recordings

In the last decade we have seen a significant growth of research and potential applications of electronic circuits that interact with the nervous system, in a wide range of applications, from basic neuroscience research to medical clinic, or from the entertainment industry to transport services. The real time acquisition and analysis of brain signals, either through wearable electroencephalography (EEG) or invasive or implantable recordings, in order to perform actions (brain machine interface) or to understand aspects of brain operation, has become scientifically and technologically feasible. This thesis aims to support neural recording applications with low noise, currentefficiency and high common-mode rejection ratio (CMRR) as main features of the recording system. One emblematic example of these applications in the neuroscience domain is the weakly electric fish neural activity recording, where the interference produced by the discharge of the fish electric organ is a key factor. Another example, from the implantable devices domain, is the nerve activity recorded with cuff electrodes, where the desired signal is interfered by electromyographic potentials generated by muscles near the cuff. In these cases, the amplitude of the interfering signals, which mainly appear in common mode, is several orders of magnitude higher than the amplitude of the signals of interest. Therefore, this thesis introduces a novel integrated neural preamplifier architecture targeting CMRR sensitive neural recording applications. The architecture is presented and analyzed in depth, deriving the preamplifier transfer function and the main design equations. We present a detailed analysis of a technique for blocking the input dc component and setting the high-pass frequency without using MOS pseudo-resistors. One of the main contributions of this work is the overall architecture coupled with an efficient and simple single-stage circuit for the preamplifier main transconductor. A fully-integrated neural preamplifier, which performs well in line with the state-ofthe-art of the field while providing enhanced CMRR performance, was fabricated in a 0.5 um CMOS process. Results from measurements show that the measured gain is 49.5 dB, bandwidth ranges from 13 Hz to 9.8 kHz, CMRR is very high (greater than 87 dB), and it is achieved jointly with a remarkable low noise (1.88 uVrms) and current-efficiency (NEF = noise efficiency factor = 2.1). A second version of the preamplifier with one external capacitor achieves a high-pass frequency of 0.1 Hz while keeping the performance of the fully-integrated version. In addition, we present in-vivo measurements made with the proposed architecture in a weakly electric fish (Gymnotus omarorum), showing the ability of the preamplifier to acquire neural signals from high amplitude common mode interference in an unshielded environment. This was the first in-vivo testing of a neural recording integrated circuit designed in Uruguay done in a local lab. Furthermore, signals recorded with our unshielded low-power battery-powered preamplifier perfectly match with those of a shielded commercially-available amplifier (ac-plugged, without power restrictions). To the best of our knowledge, the proposed preamplifier is the best option for applications that simultaneously need low noise, high CMRR and current-efficiency. Furthermore, in this thesis we applied the aforementioned architecture to bandpass biquad filters, specially but not only, to those with differential input. The new architecture provides a significant reduction in consumption (up to 30%) and/or makes it possible to block a higher level of dc at the input (up to the double, without using decoupling capacitors). Next, we applied the novel architecture to the design of the different stages of an integrated programmable analog front-end. Results from simulations shows that the gain is programmable between 57 dB and 99 dB, the low-pass frequency is programmable between 116 Hz and 5.2 kHz, the maximum power consumption is 11.2 uA and the maximum equivalent input-referred noise voltage is 1.87 uVrms. The comparison between our front-end and other works in the state-of-the-art shows that our front-end presents the best results in terms of CMRR and noise, has the greatest value of gain and equals the best NEF reported. Finally, some system-level topics were addressed during this thesis, including the design and implementation of three prototypes of end-to-end wireless biopotentials recording systems based on off-the-shelf components. Developing and applying circuits, systems and methods, for synchronized largescale monitoring of neural activity, sensory images, and behavior, would produce a dynamic picture of the brain function, which is essential for understanding the brain in action. In this context, we hope that the present thesis become our first step to further contribute to this area