Reconfigurable Load-Modulated Power Amplifier For Energy- and Spectrum-Efficient Wireless Communications

With the increasing demand for faster date rates and extensive user connectivities, the complex modulation schemes and large-scaled arrays have been widely researched and employed in the modern wireless links e.g., 5G and beyond-5G systems. These pose major challenges to design the power amplifiers (PAs) to accommodate the system level evolution. As the critical part, the power amplifiers (PAs) dominate the output power, efficiency, linearity and reliability of the radio frequency (RF) transmitter. Consequently, the PA\u27s capability of maintaining an efficient, linear and reliable signal amplification operation is essential to the communication systems. On the other hand, due to the deployment of massive multiple input/multiple output (MIMO) technique, the highly integrated active antenna systems replaced traditional 50Ω-based PA with sectorized antenna architectures. This brings the fact that, as the beam is steered in the antenna array, the dynamic load impedance observed from PAs can be up to 2: 1 Voltage Standing Wave Ratio (VSWR) due to the time-varying phasing and output power between the adjacent antenna elements and PAs, thus severely deteriorate PAs\u27 performance. To resolve aforementioned challenges, a novel design theory of Quasi-balanced Doherty power amplifier (QB-DPA) is first presented in this dissertation, which opens a new vision to counteract the mismatch-induced degradation using reconfigurable PA architectures. In this QB-DPA design, the isolation port of the PA\u27s output coupler is alternatively terminated to 50-Ω load and ground to enable the balanced and Doherty modes. With the implementation of the silicon-on-insulator (SOI)-based single-pole-double-throw (SPDT) switch to realize the reconfiguration, the physical prototype is demonstrated exhibiting remarkable DPA performance, in terms of the linearity, efficiency and output power. Subsequently, a series/parallel QB-DPA theory that not only can improve the back-off efficiency of QB-DPA, but also significantly restore the load-mismatch degradation is proposed. This novel topology includes and unifies QB-DPA modes at balanced, series and parallel Doherty, respectively. Moreover, a novel linearity-enhanced combiner is introduced for nominal 50-Ω load to improve the linearity at both series and parallel QB-DPA modes. The reconfiguration between series and parallel operations largely restore the performance degradation when the PAs suffer a dynamic antenna mismatch condition. Finally, a wideband mismatch-resilient QB-DPA is presented. Through parallel/series reconfiguration and reciprocal biasing, it is for the first time shown that the QB-DPA is able to maintain a stable output power as well as enhanced efficiency and linearity across 2 : 1 VSWR circle, and this operation can be seamlessly extended to a wide bandwidth which holds promising potential for application to array-based massive MIMO systems

User Effect Mitigation in MIMO Terminal Antennas

The rapid growth of cellular technology over the past decade transformed our lives, enabling billions of people to enjoy interactive multimedia content and ubiquitous connectivity through a device that can fit into the palm of a hand. In part the explosive growth of the smartphone market is enabled by innovative antenna system technologies, such as multiple-input multiple-output (MIMO) systems, facilitating high data rates and reliable connections. Even though future deployment of Long Term Evolution Advanced (LTE-A) is expected to provide seamless internet connectivity at even higher speeds over a wide range of devices with different form factors, fundamental terminal antenna limitations can severely impact the actual performance of the terminal. One of the key challenges in terminal antenna design are user-induced losses. It has been shown that electromagnetic absorption in body tissues as well as antenna impedance mismatch due to user proximity significantly degrade terminal antenna performance. Moreover, user interactions are non-static, which further complicates terminal design by leading to the requirement of evaluating a wide range of hand grips and usage scenarios. This doctoral thesis explores these challenges and offers useful insight on effective user interaction mitigation. In particular, state-of-the-art multiple antenna designs have been investigated in an attempt to formulate guidelines on efficient terminal antenna design in the presence of a user (Paper I). Moreover, the major part of the thesis considers the method of adaptive impedance matching (AIM) for performance enhancements of MIMO terminals. Both ideal and very practical and realistic AIM systems have been studied in order to extend the knowledge in the area by determining achievable performance gains and providing insights on AIM gain mechanisms for different terminal antenna designs, propagation environments and user scenarios. In Paper I, five different MIMO terminal antenna designs were evaluated in 11 representative user scenarios. Two of the prototypes were optimized with the Theory of Characteristic Modes (TCM), whereas the remaining three were based on more conventional antenna types. Multiplexing efficiency (ME) was used as the MIMO system performance metric, assuming an ideal uniform 3D propagation environment. The paper focuses on performance at frequency bands below 1 GHz due to the more stringent size limitations. Paper II presents a simulation model of the complete physical channel link based on ideal lossless AIM and evaluates the potential of AIM to mitigate user effects for three terminal antennas in four user scenarios. The prototypes studied have different performances in terms of bandwidth and isolation. MIMO capacity was used as the main performance metric. In order to gain insight on the impact of terminal bandwidth, as well as system bandwidth on AIM performance, capacity calculations were performed both for the center frequency and over the full LTE Band 13. In Paper III, a practical AIM system was set up and measured in both indoor and outdoor propagation scenarios for a one-hand and a two-hand grip, including a torso phantom. The AIM system consisted of two Maury mechanical tuners controlled with LabView. MIMO capacity was used to determine performance in the different user and channel cases. The impact of different propagation environments and user cases was discussed in detail. Moreover, tuner loss estimation was done to enable the calculation of AIM net gains. In Paper IV, the simulation model from Paper II was extended to include real antenna parameters as well as simulated environments with non-uniform angular power spectra. Two fundamentally different antenna designs were measured in three user scenarios involving phantom hands, whereas non-uniform environments of different angular spreads were simulated in post-processing. The study presents results and analysis on the impact of user scenarios and environment on the AIM gains for the terminals with different antenna designs. Finally, Paper V describes a realistic AIM system with custom-designed CMOS-SOI impedance tuners on a MIMO terminal antenna. Measurement setup control, as well as MIMO system evaluation, was achieved through a custom-developed LabView software. Detailed propagation measurements in three different environments with both phantom users and real test subjects were performed. The analysis and discussions provided insights on the practical implementation of AIM as well as on its performance in realistic conditions

Impedance matching and DC-DC converter designs for tunable radio frequency based mobile telecommunication systems

Tunability and adaptability for radio frequency (RF) front-ends are highly desirable because they not only enhance functionality and performance but also reduce the circuit size and cost. This thesis presents a number of novel design strategies in DC-DC converters, impedance networks and adaptive algorithms for tunable and adaptable RF based mobile telecommunication systems. Specifically, the studies are divided into three major directions: (a) high voltage switch controller based DC-DC converters for RF switch actuation; (b) impedance network designs for impedance transformation of RF switches; and (c) adaptive algorithms for determining the required impedance states at the RF switches. In the first stage, two-phase step-up switched-capacitor (SC) DC-DC converters are explored. The SC converter has a simple control method and a reduced physical volume. The research investigations started with the linear and the non-linear voltage gain topologies. The non-linear voltage gain topology provides a higher voltage gain in a smaller number of stages compared to the linear voltage gain topology. Amongst the non-linear voltage gain topologies, a Fibonacci SC converter has been identified as having lower losses and a higher conversion ratio compared to other topologies. However, the implementation of a high voltage (HV) gain Fibonacci SC converter is complex due to the requirement of widely different gate voltages for the transistors in the Fibonacci converter. Gate driving strategies have been proposed that only require a few auxiliary transistors in order to provide the required boosted voltages for switching the transistors on and off. This technique reduces the design complexity and increases the reliability of the HV Fibonacci SC converter. For the linear voltage gain topology, a high performance complementary-metaloxide- semiconductor (CMOS) based SC DC-DC converter has been proposed in this work. The HV SC DC-DC converter has been designed in low voltage (LV) transistors technology in order to achieve higher voltage gain. Adaptive biasing circuits have been proposed to eliminate the leakage current, hence avoiding latch-up which normally occurs with low voltage transistors when they are used in a high voltage design. Thus, the SC DC-DC converter achieves more than 25% higher boosted voltage compared to converters that use HV transistors. The proposed design provides a 40% power reduction through the charge recycling circuit that reduces the effect of non-ideality in integrated HV capacitors. Moreover, the SC DC-DC converter achieves a 45% smaller area than the conventional converter through optimising the design parameters. In the second stage, the impedance network designs for transforming the impedance of RF switches to the maximum achievable impedance tuning region are investigated. The maximum achievable tuning region is bounded by the fundamental properties of the selected impedance network topology and by the tunable values of the RF switches that are variable over a limited range. A novel design technique has been proposed in order to achieve the maximum impedance tuning region, through identifying the optimum electrical distance between the RF switches at the impedance network. By varying the electrical distance between the RF switches, high impedance tuning regions are achieved across multi frequency standards. This technique reduces the cost and the insertion loss of an impedance network as the required number of RF switches is reduced. The prototype demonstrates high impedance coverages at LTE (700MHz), GSM (900MHz) and GPS (1575MHz). Integration of a tunable impedance network with an antenna for frequency-agility at the RF front-end has also been discussed in this work. The integrated system enlarges the bandwidth of a patch antenna by four times the original bandwidth and also improves the antenna return loss. The prototype achieves frequency-agility from 700MHz to 3GHz. This work demonstrates that a single transceiver with multi frequency standards can be realised by using a tunable impedance network. In the final stage, improvement to an adaptive algorithm for determining the impedance states at the RF switches has been proposed. The work has resulted in one more novel design techniques which reduce the search time in the algorithm, thus minimising the risk of data loss during the impedance tuning process. The approach reduces the search time by more than an order of magnitude by exploiting the relationships among the mass spring’s coefficient values derived from the impedance network parameters, thereby significantly reducing the convergence time of the algorithm. The algorithm with the proposed technique converges in less than half of the computational time compared to the conventional approach, hence significantly improving the search time of the algorithm. The design strategies proposed in this work contribute towards the realisation of tunable and adaptable RF based mobile telecommunication systems

SiGe-based broadband and high suppression frequency doubler ICs for wireless communications

制度:新 ; 報告番号:甲3419号 ; 学位の種類:博士(工学) ; 授与年月日:2011/9/15 ; 早大学位記番号:新574

Design and analysis of MOSFET based absorber for 5G massive MIMO base station.

Masters Degree. University of KwaZulu-Natal, Durban.The Fifth Generation (5G) technology suffers from a series of drawbacks ranging from the high cost of infrastructure development, replacement of old devices that may not be compatible with 5G, and losses within the 5G base station construct. During transmission, these losses have a negative effect on the overall performance and efficiency of transmission systems. The 5G massive-Multiple Input Multiple Output (MIMO) base station structure suffers from these losses. In addition, a loss experienced in the 5G technology is due to the reflection of signals from the receiver (Rx) branch connected to the circulators in the 5G massive-MIMO base station. Operators often specify that the worst-case reflections (return loss) over the system's operating frequency range must be 18 dB lower than the signal transmitted into the system. As feed systems become shorter and antenna systems are required to operate over broader frequency ranges, achieving an 18 dB return loss may not be practical, most especially at a 5G frequency regime. This reflection loss experienced in the 5G massive-MIMO base station results from the Rx branch's unmatched load impedance with the source impedance of the Transceiver (TX) branch. However, this problem can be solved by designing a matched circuit between the TX and RX branch of the base station. But Engineers are often faced with the challenge of designing a matching network for impedance mismatch, most especially at high frequency. For this reason, an N-channel Metal Oxide Field Effect Transistor (MOSFET) connected to a circulator has been proposed as an alternative solution to the performance and efficiency reducing effects of reflected radio frequency signal. The proposed model has been presented by connecting the Tx branch, antenna, Rx branch, and the MOSFET to each of the assumed four-port circulator ports. Two comparisons have been made between the source current and drain current of the MOSFET whenever there is a reflection from the base station's Rx branch, In this research, four case of reflection from the RX branch of the base station have been examined at 28 Ghz to analyse the model's performance. Various performance parameters (Insertion loss, Reflection coefficient, Total Power Absorbed by MOSFET (TPAM), Total Power Lost to Rectifier (TPLR), S-parameter, efficiency, etc.) have been analyzed for the validity, stability, and reliability of the proposed model. At worst case reflection from port-3 of the circulator, TPAM, TPLR and reflection coefficient have been observed to be 0.64 mW, 2.95 mW, and 0.0001179. Comparisons have been made with existing RF absorber models using efficiency, insertion loss, frequency, RF power absorption level, and ease of implementation as a standard. The model has been observed to have an efficiency greater than 90 %, an insertion loss more significant than 38 dBm at a frequency of 28 GHz

Reconfigurable Antennas

In this new book, we present a collection of the advanced developments in reconfigurable antennas and metasurfaces. It begins with a review of reconfigurability technologies, and proceeds to the presentation of a series of reconfigurable antennas, UWB MIMO antennas and reconfigurable arrays. Then, reconfigurable metasurfaces are introduced and the latest advances are presented and discussed

Integrated Filters and Couplers for Next Generation Wireless Tranceivers

The main focus of this thesis is to investigate the critical nonlinear distortion issues affecting RF/Microwave components such as power amplifiers (PA) and develop new and improved solutions that will improve efficiency and linearity of next generation RF/Microwave mobile wireless communication systems. This research involves evaluating the nonlinear distortions in PA for different analog and digital signals which have been a major concern. The second harmonic injection technique is explored and used to effectively suppress nonlinear distortions. This method consists of simultaneously feeding back the second harmonics at the output of the power amplifier (PA) into the input of the PA. Simulated and measured results show improved linearity results. However, for increasing frequency bandwidth, the suppression abilities reduced which is a limitation for 4G LTE and 5G networks that require larger bandwidth (above 5 MHz). This thesis explores creative ways to deal with this major drawback. The injection technique was modified with the aid of a well-designed band-stop filter. The compact narrowband notch filter designed was able to suppress nonlinear distortions very effectively when used before the PA. The notch filter is also integrated in the injection technique for LTE carrier aggregation (CA) with multiple carriers and significant improvement in nonlinear distortion performance was observed. This thesis also considers maximizing efficiency alongside with improved linearity performance. To improve on the efficiency performance of the PA, the balanced PA configuration was investigated. However, another major challenge was that the couplers used in this configuration are very large in size at the desired operating frequency. In this thesis, this problem was solved by designing a compact branch line coupler. The novel coupler was simulated, fabricated and measured with performance comparable to its conventional equivalent and the coupler achieved substantial size reduction over others. The coupler is implemented in the balanced PA configuration giving improved input and output matching abilities. The proposed balanced PA is also implemented in 4G LTE and 5G wireless transmitters. This thesis provides simulation and measured results for all balanced PA cases with substantial efficiency and linearity improvements observed even for higher bandwidths (above 5 MHz). Additionally, the coupler is successfully integrated with rectifiers for improved energy harvesting performance and gave improved RF-dc conversion efficienc

Vidutinių dažnių 5G belaidžių tinklų galios stiprintuvų tyrimas

This dissertation addresses the problems of ensuring efficient radio fre-quency transmission for 5G wireless networks. Taking into account, that the next generation 5G wireless network structure will be heterogeneous, the device density and their mobility will increase and massive MIMO connectivity capability will be widespread, the main investigated problem is formulated – increasing the efficiency of portable mid-band 5G wireless network CMOS power amplifier with impedance matching networks. The dissertation consists of four parts including the introduction, 3 chapters, conclusions, references and 3 annexes. The investigated problem, importance and purpose of the thesis, the ob-ject of the research methodology, as well as the scientific novelty are de-fined in the introduction. Practical significance of the obtained results, defended state-ments and the structure of the dissertation are also included. The first chapter presents an extensive literature analysis. Latest ad-vances in the structure of the modern wireless network and the importance of the power amplifier in the radio frequency transmission chain are de-scribed in detail. The latter is followed by different power amplifier archi-tectures, parameters and their improvement techniques. Reported imped-ance matching network design methods are also discussed. Chapter 1 is concluded distinguishing the possible research vectors and defining the problems raised in this dissertation. The second chapter is focused around improving the accuracy of de-signing lumped impedance matching network. The proposed methodology of estimating lumped inductor and capacitor parasitic parameters is dis-cussed in detail provi-ding complete mathematical expressions, including a summary and conclusions. The third chapter presents simulation results for the designed radio fre-quency power amplifiers. Two variations of Doherty power amplifier archi-tectures are presented in the second part, covering the full step-by-step de-sign and simulation process. The latter chapter is concluded by comparing simulation and measurement results for all designed radio frequency power amplifiers. General conclusions are followed by an extensive list of references and a list of 5 publications by the author on the topic of the dissertation. 5 papers, focusing on the subject of the discussed dissertation, have been published: three papers are included in the Clarivate Analytics Web of Sci-ence database with a citation index, one paper is included in Clarivate Ana-lytics Web of Science database Conference Proceedings, and one paper has been published in unreferred international conference preceedings. The au-thor has also made 9 presentations at 9 scientific conferences at a national and international level.Dissertatio

Antenna Systems

This book offers an up-to-date and comprehensive review of modern antenna systems and their applications in the fields of contemporary wireless systems. It constitutes a useful resource of new material, including stochastic versus ray tracing wireless channel modeling for 5G and V2X applications and implantable devices. Chapters discuss modern metalens antennas in microwaves, terahertz, and optical domain. Moreover, the book presents new material on antenna arrays for 5G massive MIMO beamforming. Finally, it discusses new methods, devices, and technologies to enhance the performance of antenna systems

Reconfigurable high efficiency class-F power amplifier using CMOS-MEMS technology

The increasing demand for wireless products to be part of our daily lives brings the need for longer battery lifetime, smaller size and lower cost. To increase battery lifetime, high efficiency power amplifiers (PAs) are needed; To make them smaller, integration or reconfiguration is aimed and to reach lower costs, technologies such as CMOS are final goals. However integration of high efficiency PA in CMOS is challenging due to the technology limitations which restricts the achievable output power and efficiency of the PA. In order to bring solutions for the above-mentioned requirements, in this thesis novel reconfigurable class-F PAs, frequency-reconfiguration, CMOS integration, impedance-reconfiguration and CMOS-MEMS implementation are addressed. Starting with a single frequency operation, a novel class-F PA for mobile applications is proposed in which with a proper harmonic tuning structure the need for extra filtering sections is eliminated, achieving an excellent harmonic-suppression level. This topology uses transmission lines and is developed to cover multiple frequency bands for purpose of global coverage with aim of size reduction. Three novel frequency reconfigurable PAs are proposed using MEMS and semiconductor switches to accomplish class-F operation at two frequencies. The main novelty of this structure is that the reconfiguration is done not only at fundamental frequency but also at harmonics with reduced number of tuning elements. Moreover, by proper placement of the switches in the stubs, the maximum voltages over the switches are minimized. The proposed structure overcomes the narrow band performance of class-F, giving an efficiency more than 60% over a 225 MHz and 175 MHz bandwidth at 900 MHz and 1800 MHz respectively. Measurement results showed high performance at both frequency bands giving 69.5% and 57.9% PAE at 900 MHz and 1800 MHz respectively. A novel CMOS class-F PA is proposed that controls up to the 3rd harmonic and can adapt to load variations due to the effect of the human body on mobile phones. It enables the integration of the PA with other devices in a single chip leading to better matching, higher performance, lower cost and smaller size. In addition, it achieves load impedance reconfigurability by using impedance tuner in its output network and by proper tuning of the network, effects of load variation on the performance are compensated. Two designs at 2.4 GHz have been done using either MOS varactors or MEMS variable capacitors as tuning devices. The design using MOS varactors show a maximum measured values of 26% PAE and 19.2 dBm output power for 50 load. For loads other than 50 ohm an improvement of 15% for PAE and 4.4 dB for output power is obtained in comparison to non-tuned one. The second design is done using MEMS variable capacitors integrated in CMOS technology through a mask-less post-processing technique. Simulations results for 50 ohm load show a peak PAE of 32.8% while delivering 18.2 dBm output power.La creixent demanda de productes sense fils en la nostra vida diària requereix dispositius de menor grandària, menor cost i amb una gran autonomia. Per reduir la mida i augmentar l'autonomia és necessari utilitzar sistemes integrats multiestàndard o reconfigurables, amb amplificadors de RF d'alta eficiència, mentre que per reduir el cost, és preferible utilitzar tecnologies econòmiques com CMOS. No obstant això, la integració en CMOS d'amplificadors de radiofreqüència, i en especial, d'alta eficiència, és un repte a causa de les limitacions de la tecnologia que restringeixen la potència de sortida realitzable i l'eficiència de l'amplificador. En aquesta tesi es tracten els diferents reptes anteriorment esmentats, proposant una nova topologia d'amplificador classe-F amb reconfiguració de freqüència, i proposant la integració d'un amplificador classe-F que s¿adapta a impedància de càrrega variable, implementat en CMOS i CMOS-MEMS. Inicialment en la tesi es proposa una topologia d'amplificador classe-F en què, gràcies a una estructura adequada a la xarxa d'adaptació, s¿elimina la necessitat de filtrat extra, aconseguint un nivell de rebuig d'harmònics excel·lent. La topologia proposada utilitza línies de transmissió i s'ha desenvolupat per dues bandes diferents, amb el disseny orientat a implementar un sistema reconfigurable. S'han aconseguit PAE de l'ordre del 80 % amb potències properes a 10 W. Un cop descrita i analitzada la topologia, s'han proposat tres amplificadors reconfigurables per doble banda freqüencial. Per a la reconfiguració s'han utilitzat MEMS i commutadors basats en semiconductors. L'estructura proposada permet la reconfiguració no només en la freqüència fonamental sinó també en els harmònics, però mantenint un nombre reduït d'elements d'ajust. A més, gràcies a l'adequada col·locació dels commutadors en les línies de transmissió, s'ha minimitzat la tensió màxima en els mateixos. Així mateix, l'estructura proposada evita la característica de banda estreta a classe-F, proporcionant una eficiència superior al 60% en unes amplades de banda de 225 MHz i de 175 MHz, per a les banda de 900 MHz i 1800 MHz respectivament. En aquestes bandes, la PAE màxima mesurada és del 69,5% i del 57,9% respectivament. Finalment, s'ha proposat un amplificador integrat en CMOS, classe-F amb control fins al tercer harmònic. L'amplificador proposat incorpora un sintonitzador a la sortida, podent així adaptar-se a variacions d'impedància de càrrega, típiques en dispositius sense fil (WLAN), degudes a l'efecte del cos humà sobre l'antena. La implementació en CMOS permet la integració de l'amplificador de potència amb altres dispositius en un únic xip, donant lloc a una millor adaptació, millor rendiment, menor cost i menor grandària del sistema. A més, gràcies a l'adaptació a les variacions de la impedància de càrrega, permet mantenir el rendiment en diferents rangs d'operació. S'han realitzat dos dissenys de l'amplificador a 2,4 GHz, un basat en varactors MOS i un altre en condensadors variables MEMS. El disseny que utilitza varactors MOS mostra una PAE màxima del 26% i una potència de 19,2 dBm per a càrrega adaptada 50 ohm. Per altres càrregues, gràcies a l'adaptació d'impedància, s'obté una millora de PAE del 15% i de 4,4 dB en potència de sortida. El disseny utilitzant condensadors MEMS s'integra en CMOS gràcies a post-processat sense màscares addicionals. Els resultats de simulació per a 50 ohm mostren una PAE del 32,8% per 18,2 dBm de potència de sortid