334 research outputs found

    A Survey on the Integration of NAND Flash Storage in the Design of File Systems and the Host Storage Software Stack

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    With the ever-increasing amount of data generate in the world, estimated to reach over 200 Zettabytes by 2025, pressure on efficient data storage systems is intensifying. The shift from HDD to flash-based SSD provides one of the most fundamental shifts in storage technology, increasing performance capabilities significantly. However, flash storage comes with different characteristics than prior HDD storage technology. Therefore, storage software was unsuitable for leveraging the capabilities of flash storage. As a result, a plethora of storage applications have been design to better integrate with flash storage and align with flash characteristics. In this literature study we evaluate the effect the introduction of flash storage has had on the design of file systems, which providing one of the most essential mechanisms for managing persistent storage. We analyze the mechanisms for effectively managing flash storage, managing overheads of introduced design requirements, and leverage the capabilities of flash storage. Numerous methods have been adopted in file systems, however prominently revolve around similar design decisions, adhering to the flash hardware constrains, and limiting software intervention. Future design of storage software remains prominent with the constant growth in flash-based storage devices and interfaces, providing an increasing possibility to enhance flash integration in the host storage software stack

    A Survey on the Integration of NAND Flash Storage in the Design of File Systems and the Host Storage Software Stack

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    With the ever-increasing amount of data generate in the world, estimated to reach over 200 Zettabytes by 2025, pressure on efficient data storage systems is intensifying. The shift from HDD to flash-based SSD provides one of the most fundamental shifts in storage technology, increasing performance capabilities significantly. However, flash storage comes with different characteristics than prior HDD storage technology. Therefore, storage software was unsuitable for leveraging the capabilities of flash storage. As a result, a plethora of storage applications have been design to better integrate with flash storage and align with flash characteristics. In this literature study we evaluate the effect the introduction of flash storage has had on the design of file systems, which providing one of the most essential mechanisms for managing persistent storage. We analyze the mechanisms for effectively managing flash storage, managing overheads of introduced design requirements, and leverage the capabilities of flash storage. Numerous methods have been adopted in file systems, however prominently revolve around similar design decisions, adhering to the flash hardware constrains, and limiting software intervention. Future design of storage software remains prominent with the constant growth in flash-based storage devices and interfaces, providing an increasing possibility to enhance flash integration in the host storage software stack

    Dynamic Binary Translation for Embedded Systems with Scratchpad Memory

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    Embedded software development has recently changed with advances in computing. Rather than fully co-designing software and hardware to perform a relatively simple task, nowadays embedded and mobile devices are designed as a platform where multiple applications can be run, new applications can be added, and existing applications can be updated. In this scenario, traditional constraints in embedded systems design (i.e., performance, memory and energy consumption and real-time guarantees) are more difficult to address. New concerns (e.g., security) have become important and increase software complexity as well. In general-purpose systems, Dynamic Binary Translation (DBT) has been used to address these issues with services such as Just-In-Time (JIT) compilation, dynamic optimization, virtualization, power management and code security. In embedded systems, however, DBT is not usually employed due to performance, memory and power overhead. This dissertation presents StrataX, a low-overhead DBT framework for embedded systems. StrataX addresses the challenges faced by DBT in embedded systems using novel techniques. To reduce DBT overhead, StrataX loads code from NAND-Flash storage and translates it into a Scratchpad Memory (SPM), a software-managed on-chip SRAM with limited capacity. SPM has similar access latency as a hardware cache, but consumes less power and chip area. StrataX manages SPM as a software instruction cache, and employs victim compression and pinning to reduce retranslation cost and capture frequently executed code in the SPM. To prevent performance loss due to excessive code expansion, StrataX minimizes the amount of code inserted by DBT to maintain control of program execution. When a hardware instruction cache is available, StrataX dynamically partitions translated code among the SPM and main memory. With these techniques, StrataX has low performance overhead relative to native execution for MiBench programs. Further, it simplifies embedded software and hardware design by operating transparently to applications without any special hardware support. StrataX achieves sufficiently low overhead to make it feasible to use DBT in embedded systems to address important design goals and requirements

    Elevating commodity storage with the SALSA host translation layer

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    To satisfy increasing storage demands in both capacity and performance, industry has turned to multiple storage technologies, including Flash SSDs and SMR disks. These devices employ a translation layer that conceals the idiosyncrasies of their mediums and enables random access. Device translation layers are, however, inherently constrained: resources on the drive are scarce, they cannot be adapted to application requirements, and lack visibility across multiple devices. As a result, performance and durability of many storage devices is severely degraded. In this paper, we present SALSA: a translation layer that executes on the host and allows unmodified applications to better utilize commodity storage. SALSA supports a wide range of single- and multi-device optimizations and, because is implemented in software, can adapt to specific workloads. We describe SALSA's design, and demonstrate its significant benefits using microbenchmarks and case studies based on three applications: MySQL, the Swift object store, and a video server.Comment: Presented at 2018 IEEE 26th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS

    Executing Hard Real-Time Programs on NAND Flash Memory Considering Read Disturb Errors

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    ํ•™์œ„๋…ผ๋ฌธ (์„์‚ฌ)-- ์„œ์šธ๋Œ€ํ•™๊ต ๋Œ€ํ•™์› ๊ณต๊ณผ๋Œ€ํ•™ ์ปดํ“จํ„ฐ๊ณตํ•™๋ถ€, 2017. 8. ์ด์ฐฝ๊ฑด.์ฃ„๊ทผ IoT ์™€ ์ž„๋ฒ ๋””๋“œ ์‹œ์Šคํ…œ์— ๋Œ€ํ•œ ๊ด€์‹ฌ์ด ๊ธ‰์ฆํ•˜๋ฉด์„œ NAND ํ”Œ๋ž˜์‰ฌ ๋ฉ”๋ชจ๋ฆฌ๋ฅผ ์‚ฌ์šฉํ•˜๋Š” ์žฅ์น˜๋“ค ๋˜ํ•œ ์ฆ๊ฐ€ํ•˜๊ณ  ์žˆ๋‹ค. ์ด๋Ÿฌํ•œ ์žฅ์น˜๋“ค์€ NAND ํ”Œ๋ž˜์‹œ ๋ฉ”๋ชจ๋ฆฌ๋ฅผ ์‚ฌ์šฉํ•จ์œผ๋กœ์จ ํฐ ์ด๋“์„ ์–ป์„ ์ˆ˜ ์žˆ์ง€๋งŒ ์—ฌ์ „ํžˆ ์‹ ๋ขฐ์„ฑ ์ธก๋ฉด์—์„œ๋Š” ํ•ด๊ฒฐ๋˜์ง€ ์•Š์€ ์ด์Šˆ๋“ค์ด ์žˆ๋‹ค. ๋ณธ ๋…ผ๋ฌธ์—์„œ๋Š” ์ด๋Ÿฌํ•œ ์‹ ๋ขฐ์„ฑ ๋ฌธ์ œ๋ฅผ ๊ทน๋ณตํ•  ์ˆ˜ ์žˆ๋Š” ๋ฐฉ์•ˆ์— ๋Œ€ํ•ด ๋…ผ์˜ํ•œ๋‹ค. NAND ํ”Œ๋ž˜์‰ฌ ๋ฉ”๋ชจ๋ฆฌ๋Š” ๊ฐ ํŽ˜์ด์ง€์— ๋Œ€ํ•ด ์ฝ๊ธฐ ๋ช…๋ น์„ ๋ฐ˜๋ณต์ ์œผ๋กœ ์ˆ˜ํ–‰ ํ•  ์žˆ๋Š” ๋ฌผ๋ฆฌ์  ํšŒ์ˆ˜๊ฐ€ ํ•œ์ •๋˜์–ด ์žˆ๊ธฐ ๋•Œ๋ฌธ์— ์ฝ๊ธฐ ํšŸ์ˆ˜๊ฐ€ ํ•œ๊ณ„์น˜์— ๋„๋‹ฌํ•˜๊ธฐ ์ „์— ์žฌํ• ๋‹น์„ ํ•ด์ฃผ์–ด์•ผ ํ•˜๋Š” ๋ฌธ์ œ๊ฐ€ ์žˆ๋‹ค. ๋ณธ ๋…ผ๋ฌธ์—์„œ๋Š” ํ”„๋กœ๊ทธ๋žจ ์ฝ”๋“œ๊ฐ€ ์ €์žฅ๋˜์–ด ์žˆ๋Š” read-only ํŽ˜์ด์ง€๋ฅผ ์ฝ์–ด ์ฝ”๋“œ๋ฅผ ์ˆ˜ํ–‰ํ•˜๋Š” ์‹ค์‹œ๊ฐ„ ์ž„๋ฒ ๋””๋“œ ์‹œ์Šคํ…œ์—์„œ ์‹ค์‹œ๊ฐ„ ์ œ์•ฝ ์กฐ๊ฑด์„ ๋งŒ์กฑํ•˜๋ฉด์„œ ์žฌํ• ๋‹น์„ ํ•˜์—ฌ READ DISTURB ERROR ๋ฅผ ์ค„์ด๋Š” ๊ธฐ๋ฒ•์— ๋Œ€ํ•ด ์ œ์•ˆํ•œ๋‹ค. ๋ณธ ๋…ผ๋ฌธ์—์„œ ์ œ์•ˆํ•˜๋Š” ๊ธฐ๋ฒ•์„ ๊ตฌํ˜„ํ•˜๊ณ  ์‹คํ—˜ํ•จ์œผ๋กœ์จ, NAND ํ”Œ๋ž˜์‰ฌ ๋ฉ”๋ชจ๋ฆฌ์˜ ์ฝ๊ธฐ ํ•œ๊ณ„์น˜์— ๋„๋‹ฌํ•˜๊ธฐ ์ „์— ์žฌํ• ๋‹น์ด ๋ณด์žฅ๋จ์„ ๋ณด์ธ๋‹ค. ๋˜ํ•œ ์ œ์•ˆํ•˜๋Š” ๊ธฐ๋ฒ•์„ ์‚ฌ์šฉ ํ•  ๊ฒฝ์šฐ ์š”๊ตฌ๋˜๋Š” RAM ํฌ๊ธฐ๊ฐ€ ์ตœ๋Œ€ 48% ๊ฐ์†Œํ•จ์„ ํ™•์ธํ•œ๋‹ค1 Introduction 1 2 Related works 6 3 Background and problem description 10 3.1 NAND flash memory 10 3.2 HRT-PLRU 13 3.3 Reliability issues of the NAND flash memory 18 3.4 Problem description 28 3.5 System notation 30 4 Approach 31 4.1 Per-task analysis 31 4.2 Convex optimization 37 5 Evaluation 41 6 Future works 46 7 Conclusion 47 Summary (Korean) 48 References 49Maste

    HBM: A hybrid buffer management scheme for solid state disks

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