Neural Network Based Pattern Recognition in Visual Inspection System for Intergrated Circuit Mark Inspection

Industrial visual machine inspection system uses template or feature matching methods to locate or inspect parts or pattern on parts. These algorithms could not compensate for the change or variation on the inspected parts dynamically. Such problem was faced by a multinational semiconductor manufacturer. Therefore a study was conducted to introduce a new algorithm to inspect integrated circuit package markings. The main intend of the system was to verify if the marking can be read by humans. Algorithms that the current process uses however, was not capable in handling mark variations that was introduced by the marking process. A neural network based pattern recognition system was implemented and tested on images resembling the parts variations. Feature extraction was made simple by sectioning the region of interest (ROI) on the image into a specified (by the user) number of sections. The ratio of object pixels to the entire area of each section is calculated and used as an input into a feedforward neural network. Error-back propagation algorithm was used to train the network. The objective was to test the robustness of the network in handling pattern variations as well as the feasibility of implementing it on the production floor in tetms of execution speed. Two separate programme modules were written in C++; one for feature extraction and another for neural networks classifier. The feature extraction module was tested for its speed using various ROI sizes. The time taken for processing was round to be almost linearly related to the ROJ size and not at all effected by the number of sections. The minimum ROJ setting (200 X 200 pixels) was considerably slower at 5 5ms compared to what was required - 20ms. The neural networks c1assifier was very successful in classifying 1 3 different image patterns by learning from 4 training patterns. The classifier also clocked an average speed of 9.6ms which makes it feasible to implement it on the production floor. As a final say, it can be concluded that by carefully surveying the choices of hardware and software and its appropriate combination, this system can be seriously considered for implementation on the semiconductor production floor

Cutting the Error by Half: Investigation of Very Deep CNN and Advanced Training Strategies for Document Image Classification

We present an exhaustive investigation of recent Deep Learning architectures, algorithms, and strategies for the task of document image classification to finally reduce the error by more than half. Existing approaches, such as the DeepDocClassifier, apply standard Convolutional Network architectures with transfer learning from the object recognition domain. The contribution of the paper is threefold: First, it investigates recently introduced very deep neural network architectures (GoogLeNet, VGG, ResNet) using transfer learning (from real images). Second, it proposes transfer learning from a huge set of document images, i.e. 400,000 documents. Third, it analyzes the impact of the amount of training data (document images) and other parameters to the classification abilities. We use two datasets, the Tobacco-3482 and the large-scale RVL-CDIP dataset. We achieve an accuracy of 91.13% for the Tobacco-3482 dataset while earlier approaches reach only 77.6%. Thus, a relative error reduction of more than 60% is achieved. For the large dataset RVL-CDIP, an accuracy of 90.97% is achieved, corresponding to a relative error reduction of 11.5%