Dynamic scaling regimes of collective decision making

We investigate a social system of agents faced with a binary choice. We assume there is a correct, or beneficial, outcome of this choice. Furthermore, we assume agents are influenced by others in making their decision, and that the agents can obtain information that may guide them towards making a correct decision. The dynamic model we propose is of nonequilibrium type, converging to a final decision. We run it on random graphs and scale-free networks. On random graphs, we find two distinct regions in terms of the "finalizing time" -- the time until all agents have finalized their decisions. On scale-free networks on the other hand, there does not seem to be any such distinct scaling regions

OBDD-Based Representation of Interval Graphs

A graph $G = (V,E)$ can be described by the characteristic function of the edge set $\chi_E$ which maps a pair of binary encoded nodes to 1 iff the nodes are adjacent. Using \emph{Ordered Binary Decision Diagrams} (OBDDs) to store $\chi_E$ can lead to a (hopefully) compact representation. Given the OBDD as an input, symbolic/implicit OBDD-based graph algorithms can solve optimization problems by mainly using functional operations, e.g. quantification or binary synthesis. While the OBDD representation size can not be small in general, it can be provable small for special graph classes and then also lead to fast algorithms. In this paper, we show that the OBDD size of unit interval graphs is $O(\ | V \ | /\log \ | V \ |)$ and the OBDD size of interval graphs is $O(\ | V \ | \log \ | V \ |)$which both improve a known result from Nunkesser and Woelfel (2009). Furthermore, we can show that using our variable order and node labeling for interval graphs the worst-case OBDD size is$\Omega(\ | V \ | \log \ | V \ |)$. We use the structure of the adjacency matrices to prove these bounds. This method may be of independent interest and can be applied to other graph classes. We also develop a maximum matching algorithm on unit interval graphs using$O(\log \ | V \ |)$operations and a coloring algorithm for unit and general intervals graphs using$O(\log^2 \ | V \ |)$ operations and evaluate the algorithms empirically.Comment: 29 pages, accepted for 39th International Workshop on Graph-Theoretic Concepts 201

Synthesis of timed circuits using BDDs*

Journal ArticleThis paper presents a tool which synthesizes timed circuits from reduced state graphs. Using timing information to reduce state graphs can lead to significantly smaller and faster circuits. The tool uses implicit techniques (binary decision diagrams) to represent these graphs. This allows us to synthesize larger, more complex systems which may be intractable with an explicit representation. We are also able to create a parameterized family of solutions, facilitating technology mapping

Representation of graphs by OBDDs

AbstractRecently, it has been shown in a series of works that the representation of graphs by Ordered Binary Decision Diagrams (OBDDs) often leads to good algorithmic behavior. However, the question for which graph classes an OBDD representation is advantageous, has not been investigated, yet. In this paper, the space requirements for the OBDD representation of certain graph classes, specifically cographs, several types of graphs with few P4s, unit interval graphs, interval graphs and bipartite graphs are investigated. Upper and lower bounds are proven for all these graph classes and it is shown that in most (but not all) cases a representation of the graphs by OBDDs is advantageous with respect to space requirements

Connected Components Labeling on DRAGs

In this paper we introduce a new Connected Components Labeling (CCL) algorithm which exploits a novel approach to model decision problems as Directed Acyclic Graphs with a root, which will be called Directed Rooted Acyclic Graphs (DRAGs). This structure supports the use of sets of equivalent actions, as required by CCL, and optimally leverages these equivalences to reduce the number of nodes (decision points). The advantage of this representation is that a DRAG, differently from decision trees usually exploited by the state-of-the-art algorithms, will contain only the minimum number of nodes required to reach the leaf corresponding to a set of condition values. This combines the benefits of using binary decision trees with a reduction of the machine code size. Experiments show a consistent improvement of the execution time when the model is applied to CCL

ALGORITHMS OF FUNCTIONAL LEVEL TESTABILITY ANALYSIS FOR DIGITAL CIRCUITS

A general approach is proposed for calculating controllabilities and observabilities of signals in sequential and combinational circuits at the functional level. The methods and algorithms are based on alternative graphs which are an extension of binary decision diagrams. The algorithms are general and can be easily adjusted for calculation of different testability measures.