Genetic algorithm approach to find the best input variable partitioning

Conference PaperThis paper presents a variable partition algorithm which combines the quasi-reduced ordered multiple-terminal multiple-valued decision diagrams and genetic algorithms (GAs). The algorithm is better than the previous techniques which find a good functional decomposition by non-exhaustive search and expands the range of searching for the best decomposition providing the optimal subtable multiplicity. The possible solutions are evaluated using the gain of decomposition for a multiple-output multiple-valued logic function. The distinct feature of GA is the possible solutions being coded by real numbers. Here the simplex-based crossover is proposed to use for the recombination stage of GA. It permits to increase the GA coverag

Combinational multiple-valued circuit design by generalised disjunctive decomposition

A design of multiple-valued circuits based on the multiple-valued programmable logic arrays (MV PLA’s) by generalized disjunctive decomposition is presented. Main subjects are 1) Generalized disjunctive decomposition of multiple-valued functions using multiple-terminal multiplevalued decision diagrams (MTMDD’s); 2) Realization of functions by MV PLA-based combinatorial circuits

DDMF: An Efficient Decision Diagram Structure for Design Verification of Quantum Circuits under a Practical Restriction

Recently much attention has been paid to quantum circuit design to prepare for the future "quantum computation era." Like the conventional logic synthesis, it should be important to verify and analyze the functionalities of generated quantum circuits. For that purpose, we propose an efficient verification method for quantum circuits under a practical restriction. Thanks to the restriction, we can introduce an efficient verification scheme based on decision diagrams called Decision Diagrams for Matrix Functions (DDMFs). Then, we show analytically the advantages of our approach based on DDMFs over the previous verification techniques. In order to introduce DDMFs, we also introduce new concepts, quantum functions and matrix functions, which may also be interesting and useful on their own for designing quantum circuits.Comment: 15 pages, 14 figures, to appear IEICE Trans. Fundamentals, Vol. E91-A, No.1

Chain Reduction for Binary and Zero-Suppressed Decision Diagrams

Chain reduction enables reduced ordered binary decision diagrams (BDDs) and zero-suppressed binary decision diagrams (ZDDs) to each take advantage of the others' ability to symbolically represent Boolean functions in compact form. For any Boolean function, its chain-reduced ZDD (CZDD) representation will be no larger than its ZDD representation, and at most twice the size of its BDD representation. The chain-reduced BDD (CBDD) of a function will be no larger than its BDD representation, and at most three times the size of its CZDD representation. Extensions to the standard algorithms for operating on BDDs and ZDDs enable them to operate on the chain-reduced versions. Experimental evaluations on representative benchmarks for encoding word lists, solving combinatorial problems, and operating on digital circuits indicate that chain reduction can provide significant benefits in terms of both memory and execution time