101 research outputs found
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System Design and Implementation for Hybrid Network Function Virtualization
With the application of virtualization technology in computer networks, many new research areas and techniques have been explored, such as network function virtualization (NFV). A significant benefit of virtualization is that it reduces the cost of a network system and increases its flexibility. Due to the increasing complexity of the network environment and constantly improving network scale and bandwidth, it is imperative to aim for higher performance, extensibility, and flexibility in the future network systems. In this dissertation, hybrid NFV platforms applying virtualization technology are proposed. We further explore the techniques used to improve the performance, scalability and resilience of these systems.
In the first part of this dissertation, we describe a new heterogeneous hardware-software NFV platform that provides scalability and programmability while supporting significant hardware-level parallelism and reconfiguration. Our computing platform takes advantage of both field-programmable gate arrays (FPGAs) and microprocessors to implement numerous virtual network functions (VNFs) that can be dynamically customized to specific network flow needs. Traffic management and hardware reconfiguration functions are performed by a global coordinator which allows for the rapid sharing of network function states and continuous evaluation of network function needs. With the help of state sharing mechanism offered by the coordinator, customer-defined VNF instances can be easily migrated between heterogeneous middleboxes as the network environment changes. A resource allocation algorithm dynamically assesses resource deployments as network flows and conditions are updated.
In the second part of this thesis document, we explore a new session-level approach for NFV that implements distributed agents in heterogeneous middleboxes to steer packets belonging to different sessions through session-specific service chains. Our session-level approach supports inter-domain service chaining with both FPGA- and processor-based middleboxes, dynamic reconfiguration of service chains for ongoing sessions, and the application of session-level approaches for UDP-based protocols. To demonstrate our approach, we establish inter-domain service chains for QUIC sessions, and reconfigure the service chains across a range of FPGA- and processor-based middleboxes. We show that our session-level approach can successfully reconfigure service chains for individual QUIC sessions. Compared with software implementations, the distributed agents implemented on FPGAs show better performance in various test scenarios
Hybrid Computing for Interactive Datacenter Applications
Field-Programmable Gate Arrays (FPGAs) are more energy efficient and cost
effective than CPUs for a wide variety of datacenter applications. Yet, for
latency-sensitive and bursty workloads, this advantage can be difficult to
harness due to high FPGA spin-up costs. We propose that a hybrid FPGA and CPU
computing framework can harness the energy efficiency benefits of FPGAs for
such workloads at reasonable cost. Our key insight is to use FPGAs for
stable-state workload and CPUs for short-term workload bursts. Using this
insight, we design Spork, a lightweight hybrid scheduler that can realize these
energy efficiency and cost benefits in practice. Depending on the desired
objective, Spork can trade off energy efficiency for cost reduction and vice
versa. It is parameterized with key differences between FPGAs and CPUs in terms
of power draw, performance, cost, and spin-up latency. We vary this parameter
space and analyze various application and worker configurations on production
and synthetic traces. Our evaluation of cloud workloads shows that
energy-optimized Spork is not only more energy efficient but it is also cheaper
than homogeneous platforms--for short application requests with tight
deadlines, it is 1.53x more energy efficient and 2.14x cheaper than using only
FPGAs. Relative to an idealized version of an existing cost-optimized hybrid
scheduler, energy-optimized Spork provides 1.2-2.4x higher energy efficiency at
comparable cost, while cost-optimized Spork provides 1.1-2x higher energy
efficiency at 1.06-1.2x lower cost.Comment: 13 page
Understanding O-RAN: Architecture, Interfaces, Algorithms, Security, and Research Challenges
The Open Radio Access Network (RAN) and its embodiment through the O-RAN
Alliance specifications are poised to revolutionize the telecom ecosystem.
O-RAN promotes virtualized RANs where disaggregated components are connected
via open interfaces and optimized by intelligent controllers. The result is a
new paradigm for the RAN design, deployment, and operations: O-RAN networks can
be built with multi-vendor, interoperable components, and can be
programmatically optimized through a centralized abstraction layer and
data-driven closed-loop control. Therefore, understanding O-RAN, its
architecture, its interfaces, and workflows is key for researchers and
practitioners in the wireless community. In this article, we present the first
detailed tutorial on O-RAN. We also discuss the main research challenges and
review early research results. We provide a deep dive of the O-RAN
specifications, describing its architecture, design principles, and the O-RAN
interfaces. We then describe how the O-RAN RAN Intelligent Controllers (RICs)
can be used to effectively control and manage 3GPP-defined RANs. Based on this,
we discuss innovations and challenges of O-RAN networks, including the
Artificial Intelligence (AI) and Machine Learning (ML) workflows that the
architecture and interfaces enable, security and standardization issues.
Finally, we review experimental research platforms that can be used to design
and test O-RAN networks, along with recent research results, and we outline
future directions for O-RAN development.Comment: 33 pages, 16 figures, 3 tables. Submitted for publication to the IEE
A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services
Datacenter workloads demand high computational capabilities, flexibility, power efficiency, and low cost. It is challenging to improve all of these factors simultaneously. To advance datacenter capabilities beyond what commodity server designs can provide, we designed and built a composable, reconfigurable hardware fabric based on field programmable gate arrays (FPGA). Each server in the fabric contains one FPGA, and all FPGAs within a 48-server rack are interconnected over a low-latency, high-bandwidth network. We describe a medium-scale deployment of this fabric on a bed of 1632 servers, and measure its effectiveness in accelerating the ranking component of the Bing web search engine. We describe the requirements and architecture of the system, detail the critical engineering challenges and solutions needed to make the system robust in the presence of failures, and measure the performance, power, and resilience of the system. Under high load, the large-scale reconfigurable fabric improves the ranking throughput of each server by 95% at a desirable latency distribution or reduces tail latency by 29% at a fixed throughput. In other words, the reconfigurable fabric enables the same throughput using only half the number of servers
Demystifying Internet of Things Security
Break down the misconceptions of the Internet of Things by examining the different security building blocks available in Intel Architecture (IA) based IoT platforms. This open access book reviews the threat pyramid, secure boot, chain of trust, and the SW stack leading up to defense-in-depth. The IoT presents unique challenges in implementing security and Intel has both CPU and Isolated Security Engine capabilities to simplify it. This book explores the challenges to secure these devices to make them immune to different threats originating from within and outside the network. The requirements and robustness rules to protect the assets vary greatly and there is no single blanket solution approach to implement security. Demystifying Internet of Things Security provides clarity to industry professionals and provides and overview of different security solutions What You'll Learn Secure devices, immunizing them against different threats originating from inside and outside the network Gather an overview of the different security building blocks available in Intel Architecture (IA) based IoT platforms Understand the threat pyramid, secure boot, chain of trust, and the software stack leading up to defense-in-depth Who This Book Is For Strategists, developers, architects, and managers in the embedded and Internet of Things (IoT) space trying to understand and implement the security in the IoT devices/platforms
Modelling, Dimensioning and Optimization of 5G Communication Networks, Resources and Services
This reprint aims to collect state-of-the-art research contributions that address challenges in the emerging 5G networks design, dimensioning and optimization. Designing, dimensioning and optimization of communication networks resources and services have been an inseparable part of telecom network development. The latter must convey a large volume of traffic, providing service to traffic streams with highly differentiated requirements in terms of bit-rate and service time, required quality of service and quality of experience parameters. Such a communication infrastructure presents many important challenges, such as the study of necessary multi-layer cooperation, new protocols, performance evaluation of different network parts, low layer network design, network management and security issues, and new technologies in general, which will be discussed in this book
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