A Flexible RFIC Architecture for High-Sensitivity Reception and Compressed-Sampling Wideband Detection

Compressed sensing (CS) is a new signal processing approach that has disrupted the Shannon-Nyquist limit based design methodology and has opened promising avenues for building energy-efficient radio frequency integrated circuits (RFICs) for detecting and estimating particular classes (i.e. sparse) of signals. Whether in application domains where naturally occurring signals are sparse or where representations of signals subject to the fidelity limits or configuration settings of the radio equipment are often found to be sparse, the emergence of CS has forced us to re-imagine the radio receiver. While realizing some of the potential benefits promised by theory, CS-RFIC architectures proposed in earlier research were not particularly suitable for mass-market applications. This thesis demonstrates how to take a new signal processing technique all the way to the hardware level. So far, the main focus in literature has been how CS offers a significant advantage for signal processing. This work will show how CS techniques drive novel architectures down to the integrated circuit level. This requires close collaboration between communication system developers, integrated circuit designers and signal processing experts. The trans-disciplinary approach presented here has led to the unification of CS-inspired architectures for wideband signal detection with robust, legacy architectures for high-sensitivity signal reception. The result is a functionally flexible and rapidly reconfigurable CMOS RFIC compactly implemented on silicon with the potential to achieve the cost, size and power targets in mass-market applications. While the focus of this thesis is RF signal finding and reception in frequency, the CS-based RFIC design approach presented here is applicable to a wide range of other applications like direction-of-arrival and range finding. We begin by developing a signal-model driven approach for optimizing the performance of CS RF frontends (RFFEs). We consider sparse multiband signals with supports contained within a frequency span extending from fMIN to fMAX. The resulting quadrature analog-to-information converter (QAIC) is a flexible-bandwidth, blind sub-Nyquist sampling architecture optimized for energy consumption and sensitivity performance. The QAIC addresses key drawbacks of earlier CS RFFE architectures like the modulated wideband converter (MWC) that implement frequency spans extending from 0 to fMAX. While these earlier architectures, a direct implementation of CS signal processing theory, have several beneficial properties, the true cost of their proposed analog frontend significantly diminishes the sensitivity performance and energy savings that CS methods have the potential to deliver. They use periodic pseudo-random bit sequence (PRBS) generators where the clock frequency fPRBS scales up with the maximum signal frequency fMAX. In contrast, fPRBS in the QAIC RFFE scales up with the instantaneous bandwidth IBW, where IBW = ( fMAX − fMIN ). This results in significant performance advantages in terms of energy consumption and sensitivity performance. The QAIC uncouples fPRBS from fMAX by performing wideband quadrature downconversion ahead of analog mixing with PRBSs at an intermediate frequency (IF). However, the dual heterodyne architecture of the QAIC suffers from spurious responses at IF caused by gain and phase imbalance in its wideband downconverter. We then show how the direct RF-to-information converter (DRF2IC) compactly adds CS wideband detection to a direct conversion frequency-translational noise-cancelling (FTNC) receiver by introducing pseudo-random modulation of the local oscillator (LO) signals and by consolidating multiple CS measurements into one hardware branch. The DRF2IC inherits benefits of the FTNC receiver in signal reception mode. In CS wideband detection mode, the DRF2IC inherits key advantages from both the earlier lowpass CS architectures and the QAIC while avoiding the drawbacks of both. It uncouples fPRBS from fMAX in contrast with the MWC. In contrast with the QAIC, the DRF2IC employs a direct conversion RF chain with narrow bandwidth analog components at baseband thereby avoiding frequency-dependent gain and phase imbalance. The DRF2IC chip occupies 0.56mm2 area in 65nm CMOS. In reception mode, it consumes 46.5mW from 1.15V and delivers 40MHz RF bandwidth, 41.5dB conversion gain, 3.6dB noise figure (NF) and -2dBm blocker 1dB compression point (B1dB). In CS wideband detection mode, 66dB operational dynamic range, 40dB instantaneous dynamic range and 1.43GHz instantaneous bandwidth are demonstrated and 6 interferers each 10MHz wide scattered over a 1.27GHz span are detected in 1.2us consuming 58.5mW

A Framework to Analyze Energy Efficiency of Multi-Band Spectrum Sensing Algorithms

Cognitive radio (CR) is a device which can detect wireless communication channels that are not in use and adapt its parameters intelligently. Networks with CRs use the available frequency bands much more efficiently and hence have higher data rates compare to traditional radios. Spectrum sensing is the class of techniques used by CRs to understand its wireless environment. Recent research on evaluating multi-band spectrum sensing algorithms is limited to only algorithm complexity and optimization; therefore, the primary goal of the study is to devise a novel framework that analyzes a multi-band spectrum sensing algorithm in terms of energy consumption and algorithm efficiency. The proposed structure leads to a comparison and evaluation of a large class of multi-band spectrum sensing algorithms. Multi-band spectrum sensing search methods such as linear, random and binary are evaluated for energy loss and detection performance using the proposed framework

Real-Time Waveform Prototyping

Mobile Netzwerke der fünften Generation zeichen sich aus durch vielfältigen Anforderungen und Einsatzszenarien. Drei unterschiedliche Anwendungsfälle sind hierbei besonders relevant: 1) Industrie-Applikationen fordern Echtzeitfunkübertragungen mit besonders niedrigen Ausfallraten. 2) Internet-of-things-Anwendungen erfordern die Anbindung einer Vielzahl von verteilten Sensoren. 3) Die Datenraten für Anwendung wie z.B. der Übermittlung von Videoinhalten sind massiv gestiegen. Diese zum Teil gegensätzlichen Erwartungen veranlassen Forscher und Ingenieure dazu, neue Konzepte und Technologien für zukünftige drahtlose Kommunikationssysteme in Betracht zu ziehen. Ziel ist es, aus einer Vielzahl neuer Ideen vielversprechende Kandidatentechnologien zu identifizieren und zu entscheiden, welche für die Umsetzung in zukünftige Produkte geeignet sind. Die Herausforderungen, diese Anforderungen zu erreichen, liegen jedoch jenseits der Möglichkeiten, die eine einzelne Verarbeitungsschicht in einem drahtlosen Netzwerk bieten kann. Daher müssen mehrere Forschungsbereiche Forschungsideen gemeinsam nutzen. Diese Arbeit beschreibt daher eine Plattform als Basis für zukünftige experimentelle Erforschung von drahtlosen Netzwerken unter reellen Bedingungen. Es werden folgende drei Aspekte näher vorgestellt: Zunächst erfolgt ein Überblick über moderne Prototypen und Testbed-Lösungen, die auf großes Interesse, Nachfrage, aber auch Förderungsmöglichkeiten stoßen. Allerdings ist der Entwicklungsaufwand nicht unerheblich und richtet sich stark nach den gewählten Eigenschaften der Plattform. Der Auswahlprozess ist jedoch aufgrund der Menge der verfügbaren Optionen und ihrer jeweiligen (versteckten) Implikationen komplex. Daher wird ein Leitfaden anhand verschiedener Beispiele vorgestellt, mit dem Ziel Erwartungen im Vergleich zu den für den Prototyp erforderlichen Aufwänden zu bewerten. Zweitens wird ein flexibler, aber echtzeitfähiger Signalprozessor eingeführt, der auf einer software-programmierbaren Funkplattform läuft. Der Prozessor ermöglicht die Rekonfiguration wichtiger Parameter der physikalischen Schicht während der Laufzeit, um eine Vielzahl moderner Wellenformen zu erzeugen. Es werden vier Parametereinstellungen 'LLC', 'WiFi', 'eMBB' und 'IoT' vorgestellt, um die Anforderungen der verschiedenen drahtlosen Anwendungen widerzuspiegeln. Diese werden dann zur Evaluierung der die in dieser Arbeit vorgestellte Implementierung herangezogen. Drittens wird durch die Einführung einer generischen Testinfrastruktur die Einbeziehung externer Partner aus der Ferne ermöglicht. Das Testfeld kann hier für verschiedenste Experimente flexibel auf die Anforderungen drahtloser Technologien zugeschnitten werden. Mit Hilfe der Testinfrastruktur wird die Leistung des vorgestellten Transceivers hinsichtlich Latenz, erreichbarem Durchsatz und Paketfehlerraten bewertet. Die öffentliche Demonstration eines taktilen Internet-Prototypen, unter Verwendung von Roboterarmen in einer Mehrbenutzerumgebung, konnte erfolgreich durchgeführt und bei mehreren Gelegenheiten präsentiert werden.:List of figures List of tables Abbreviations Notations 1 Introduction 1.1 Wireless applications 1.2 Motivation 1.3 Software-Defined Radio 1.4 State of the art 1.5 Testbed 1.6 Summary 2 Background 2.1 System Model 2.2 PHY Layer Structure 2.3 Generalized Frequency Division Multiplexing 2.4 Wireless Standards 2.4.1 IEEE 802.15.4 2.4.2 802.11 WLAN 2.4.3 LTE 2.4.4 Low Latency Industrial Wireless Communications 2.4.5 Summary 3 Wireless Prototyping 3.1 Testbed Examples 3.1.1 PHY - focused Testbeds 3.1.2 MAC - focused Testbeds 3.1.3 Network - focused testbeds 3.1.4 Generic testbeds 3.2 Considerations 3.3 Use cases and Scenarios 3.4 Requirements 3.5 Methodology 3.6 Hardware Platform 3.6.1 Host 3.6.2 FPGA 3.6.3 Hybrid 3.6.4 ASIC 3.7 Software Platform 3.7.1 Testbed Management Frameworks 3.7.2 Development Frameworks 3.7.3 Software Implementations 3.8 Deployment 3.9 Discussion 3.10 Conclusion 4 Flexible Transceiver 4.1 Signal Processing Modules 4.1.1 MAC interface 4.1.2 Encoding and Mapping 4.1.3 Modem 4.1.4 Post modem processing 4.1.5 Synchronization 4.1.6 Channel Estimation and Equalization 4.1.7 Demapping 4.1.8 Flexible Configuration 4.2 Analysis 4.2.1 Numerical Precision 4.2.2 Spectral analysis 4.2.3 Latency 4.2.4 Resource Consumption 4.3 Discussion 4.3.1 Extension to MIMO 4.4 Summary 5 Testbed 5.1 Infrastructure 5.2 Automation 5.3 Software Defined Radio Platform 5.4 Radio Frequency Front-end 5.4.1 Sub 6 GHz front-end 5.4.2 26 GHz mmWave front-end 5.5 Performance evaluation 5.6 Summary 6 Experiments 6.1 Single Link 6.1.1 Infrastructure 6.1.2 Single Link Experiments 6.1.3 End-to-End 6.2 Multi-User 6.3 26 GHz mmWave experimentation 6.4 Summary 7 Key lessons 7.1 Limitations Experienced During Development 7.2 Prototyping Future 7.3 Open points 7.4 Workflow 7.5 Summary 8 Conclusions 8.1 Future Work 8.1.1 Prototyping Workflow 8.1.2 Flexible Transceiver Core 8.1.3 Experimental Data-sets 8.1.4 Evolved Access Point Prototype For Industrial Networks 8.1.5 Testbed Standardization A Additional Resources A.1 Fourier Transform Blocks A.2 Resource Consumption A.3 Channel Sounding using Chirp sequences A.3.1 SNR Estimation A.3.2 Channel Estimation A.4 Hardware part listThe demand to achieve higher data rates for the Enhanced Mobile Broadband scenario and novel fifth generation use cases like Ultra-Reliable Low-Latency and Massive Machine-type Communications drive researchers and engineers to consider new concepts and technologies for future wireless communication systems. The goal is to identify promising candidate technologies among a vast number of new ideas and to decide, which are suitable for implementation in future products. However, the challenges to achieve those demands are beyond the capabilities a single processing layer in a wireless network can offer. Therefore, several research domains have to collaboratively exploit research ideas. This thesis presents a platform to provide a base for future applied research on wireless networks. Firstly, by giving an overview of state-of-the-art prototypes and testbed solutions. Secondly by introducing a flexible, yet real-time physical layer signal processor running on a software defined radio platform. The processor enables reconfiguring important parameters of the physical layer during run-time in order to create a multitude of modern waveforms. Thirdly, by introducing a generic test infrastructure, which can be tailored to prototype diverse wireless technology and which is remotely accessible in order to invite new ideas by third parties. Using the test infrastructure, the performance of the flexible transceiver is evaluated regarding latency, achievable throughput and packet error rates.:List of figures List of tables Abbreviations Notations 1 Introduction 1.1 Wireless applications 1.2 Motivation 1.3 Software-Defined Radio 1.4 State of the art 1.5 Testbed 1.6 Summary 2 Background 2.1 System Model 2.2 PHY Layer Structure 2.3 Generalized Frequency Division Multiplexing 2.4 Wireless Standards 2.4.1 IEEE 802.15.4 2.4.2 802.11 WLAN 2.4.3 LTE 2.4.4 Low Latency Industrial Wireless Communications 2.4.5 Summary 3 Wireless Prototyping 3.1 Testbed Examples 3.1.1 PHY - focused Testbeds 3.1.2 MAC - focused Testbeds 3.1.3 Network - focused testbeds 3.1.4 Generic testbeds 3.2 Considerations 3.3 Use cases and Scenarios 3.4 Requirements 3.5 Methodology 3.6 Hardware Platform 3.6.1 Host 3.6.2 FPGA 3.6.3 Hybrid 3.6.4 ASIC 3.7 Software Platform 3.7.1 Testbed Management Frameworks 3.7.2 Development Frameworks 3.7.3 Software Implementations 3.8 Deployment 3.9 Discussion 3.10 Conclusion 4 Flexible Transceiver 4.1 Signal Processing Modules 4.1.1 MAC interface 4.1.2 Encoding and Mapping 4.1.3 Modem 4.1.4 Post modem processing 4.1.5 Synchronization 4.1.6 Channel Estimation and Equalization 4.1.7 Demapping 4.1.8 Flexible Configuration 4.2 Analysis 4.2.1 Numerical Precision 4.2.2 Spectral analysis 4.2.3 Latency 4.2.4 Resource Consumption 4.3 Discussion 4.3.1 Extension to MIMO 4.4 Summary 5 Testbed 5.1 Infrastructure 5.2 Automation 5.3 Software Defined Radio Platform 5.4 Radio Frequency Front-end 5.4.1 Sub 6 GHz front-end 5.4.2 26 GHz mmWave front-end 5.5 Performance evaluation 5.6 Summary 6 Experiments 6.1 Single Link 6.1.1 Infrastructure 6.1.2 Single Link Experiments 6.1.3 End-to-End 6.2 Multi-User 6.3 26 GHz mmWave experimentation 6.4 Summary 7 Key lessons 7.1 Limitations Experienced During Development 7.2 Prototyping Future 7.3 Open points 7.4 Workflow 7.5 Summary 8 Conclusions 8.1 Future Work 8.1.1 Prototyping Workflow 8.1.2 Flexible Transceiver Core 8.1.3 Experimental Data-sets 8.1.4 Evolved Access Point Prototype For Industrial Networks 8.1.5 Testbed Standardization A Additional Resources A.1 Fourier Transform Blocks A.2 Resource Consumption A.3 Channel Sounding using Chirp sequences A.3.1 SNR Estimation A.3.2 Channel Estimation A.4 Hardware part lis

Design of software radio

Software Define Radio (SDR) has become a prevalent technology in wireless systems. In SDR some or all of the signal specific handling is implemented in software functions, while other functions like decimation, interpolation, digital up-conversion and digital down conversion are done on reprogrammable Digital Signal Processor or Field Programmable Gate Arrays.Twelve laboratory exercises have been designed to lead the student through the process of using the Universal Software Radio peripheral (USRP) hardware and GNU Radio open source software

Design of software radio

Software Define Radio (SDR) has become a prevalent technology in wireless systems. In SDR some or all of the signal specific handling is implemented in software functions, while other functions like decimation, interpolation, digital up-conversion and digital down conversion are done on reprogrammable Digital Signal Processor or Field Programmable Gate Arrays.Twelve laboratory exercises have been designed to lead the student through the process of using the Universal Software Radio peripheral (USRP) hardware and GNU Radio open source software

A Primer on Software Defined Radios

The commercial success of cellular phone systems during the late 1980s and early 1990 years heralded the wireless revolution that became apparent at the turn of the 21st century and has led the modern society to a highly interconnected world where ubiquitous connectivity and mobility are enabled by powerful wireless terminals. Software defined radio (SDR) technology has played a major role in accelerating the pace at which wireless capabilities have advanced, in particular over the past 15 years, and SDRs are now at the core of modern wireless communication systems. In this paper we give an overview of SDRs that includes a discussion of drivers and technologies that have contributed to their continuous advancement, and presents the theory needed to understand the architecture and operation of current SDRs. We also review the choices for SDR platforms and the programming options that are currently available for SDR research, development, and teaching, and present case studies illustrating SDR use. Our hope is that the paper will be useful as a reference to wireless researchers and developers working in the industry or in academic settings on further advancing and refining the capabilities of wireless systems