Accurate Time-Domain Simulation of Continuous-Time Sigma–Delta Modulators

International audienceIn this paper we present a methodology for the simulation of continuous-time sigma-delta converters. This method, based on a fixed-step algorithm, permits not only a time-domain simulation of the modulator output but also the simulation of intermediary signals. The method is based on the discretization of the continuous-time models and the use of a discrete simulator such as Simulink, which is more efficient than an analog simulator. By using filters with a sampling frequency higher than the modulator output frequency, the model can simulate input signals with a bandwidth which is higher than half the modulator sampling frequency. The transformation is exact in terms of Noise Transfer Function and asymptotically exact in terms of Signal Transfer Function (the Transfer Function from the modulator input to each stage filter output rapidly tends to the continuous-time model transfer function when the number of steps increases)

Contribution to the design of continuous -time Sigma - Delta Modulators based on time delay elements

The research carried out in this thesis is focused in the development of a new class of data converters for digital radio. There are two main architectures for communication receivers which perform a digital demodulation. One of them is based on analog demodulation to the base band and digitization of the I/Q components. Another option is to digitize the band pass signal at the output of the IF stage using a bandpass Sigma-Delta modulator. Bandpass Sigma- Delta modulators can be implemented with discrete-time circuits, using switched capacitors or continuous-time circuits. The main innovation introduced in this work is the use of passive transmission lines in the loop filter of a bandpass continuous-time Sigma-Delta modulator instead of the conventional solution with gm-C or LC resonators. As long as transmission lines are used as replacement of a LC resonator in RF technology, it seems compelling that transmission lines could improve bandpass continuous-time Sigma-Delta modulators. The analysis of a Sigma- Delta modulator using distributed resonators has led to a completely new family of Sigma- Delta modulators which possess properties inherited both from continuous-time and discretetime Sigma-Delta modulators. In this thesis we present the basic theory and the practical design trade-offs of this new family of Sigma-Delta modulators. Three demonstration chips have been implemented to validate the theoretical developments. The first two are a proof of concept of the application of transmission lines to build lowpass and bandpass modulators. The third chip summarizes all the contributions of the thesis. It consists of a transmission line Sigma-Delta modulator which combines subsampling techniques, a mismatch insensitive circuitry and a quadrature architecture to implement the IF to digital stage of a receiver

Design of interpolative sigma delta modulators via a semi- infinite programming approach

This paper considers the design of interpolative sigma delta modulators (SDMs). The design problem is formulated as two different optimization problems. The first optimization problem is to determine the denominator coefficients. The objective of the optimization problem is to minimize the energy of the error function in the passband of the loop filter in which the error function reflects the noise output transfer function and the ripple of the input output transfer function. The constraint of the optimization problem refers to the specification of the error function defined in the frequency domain. The second optimization problem is to determine the numerator coefficients in which the cost function is to minimize the stopband ripple energy of the loop filter subject to the stability condition of the noise output and input output transfer functions. These two optimization problems are actually quadratic semi-infinite programming (SIP) problems. By employing our recently proposed dual parameterization method for solving the problems, global optimal solutions that satisfy the corresponding continuous constraint are guaranteed if the solutions exist. The advantages of this formulation are the guarantee of the stability of the noise output and input output transfer functions, applicability to design rational IIR filters without imposing specific filter structures such as Laguerre filter and Butterworth filter structures, and the avoidance of the iterative design of numerator and the denominator coefficients because the convergence of the iterative design is not guaranteed. Our simulation results show that this proposed design yields a significant improvement in the signal-to-noise ratio (SNR) compared to the existing designs

Fixed-step Simulation of Continuous-Time sigma-delta Modulators

International audienceA methodology for the simulation of continuous time sigma-delta (ΣΔ) converters is presented in this paper. This method permits the simulation of ΣΔ modulators employing continuous-time filters using a fixed-step algorithm. The analysis method is based on the discretization of a continuous-time model and using a discrete simulator, which is more efficient than an analog simulator. In our analysis approach, each samplingperiod is divided into a fixed number of steps. This transformation is exact in term of Noise Transfer Function and asymptotically exact in term of Signal Transfer Function (the Signal Transfer Function of the model rapidly tends to the continuous time model transfer function when the number of steps increases). Moreover, the ideal step-size can be estimated from the bandwidth of the input signal

A New Method to Synthesize and Optimize Band-Pass Delta-Sigma Modulators for Parallel Converters

An analysis and synthesis method for continuoustime (CT) band-pass delta-sigma modulators, applicable in parallel converters is presented in this paper. This method makes the design of band-pass delta-sigma modulators possible in a wide range of central frequencies and high DAC+ADC delays. This method is also applicable for narrow-band deltasigma converters in order to improve their performances

Extended frequency-band-decomposition sigma–delta A/D converter

Parallelism can be used to increase the bandwidths of ADC converters based on sigma–delta modulators. Each modulator converts a part of the input signal band and is followed by a digital filter. Unfortunately, solutions using bandpass sigma–delta modulators are very sensitive to the position of the modulators' central frequencies. This paper shows the feasibility of a frequency-band-decomposition (FBD) ADC using continuous time bandpass sigma–delta modulators, even in the case of large analog mismatches. The major benefit of such a solution, called extended-frequency-band-decomposition (EFBD) is its low sensitivity to analog parameters. For example, a relative error in the central frequencies of 4% can be accepted without significant degradation in the performance (other published FBD ADCs require a precision of the central frequencies better than 0.1%). This paper will focus on the performance which can be reached with this system, and the architecture of the digital part. The quantization of coefficients and operators will be addressed. It will be shown that a 14 bit resolution can be theoretically reached using 10 sixth-order bandpass modulators at a sampling frequency of 800 MHz which results in a bandwidth of 80 MHz centered around 200 MHz (the resolution depends on the effective quality factor of the filters of the analog modulators)

Multiband Analog-to-Digital Conversion

The current trend in the world of digital communications is the design of versatile devices that may operate using several different communication standards in order to increase the number of locations for which a particular device may be used. The signal is quantized early on in the reciever path by Analog-to-Digital Converters (ADCs), which allows the rest of the signal processing to be done by low complexity, low power digital circuits. For this reason, it is advantageous to create an architecture that can quantize different bandwidths at different frequencies to suit several different communication protocols. This thesis outlines the design of an architecture that uses multiple ADCs in parallel to quantize several different bandwidths of a wideband signal. A multirate filter bank is then applied to approximate perfect reconstruction of the wideband signal from its subband parts. This highly flexible architecture is able to quantize signals of varying bandwidths at a wide range of frequencies by using identical hardware in every channel, which also makes for a simple design. A prototype for the quantizer used in each channel, a frequency-selective fourth-order sigma-delta (CA ) ADC, was designed and fabricated in a 0.5 pm CMOS process. This device uses a switched-capacitor technique to implement the frequency selection in the front-end of the CA ADC in each channel. Running at a 5MHz sample rate, the device can select any of the first sixteen 156.25kHz wide bands for conversion. Testing results for this fabricated part are also presented

Design and Implementation of Novel FPGA Based Time-Interleaved Variable Centre-Frequency Digital Sigma-Delta Modulators

Novel, multi-path, time-interleaved digital sigma-delta modulators that can operate at any arbitrary frequency from DC to Nyquist are designed, analysed and synthesized in this study. Dual- and quadruple-path fourth-order Butterworth, Chebyshev, Inverse Chebyshev and Elliptical based digital sigma-delta modulators, which offer designers the flexibility of specifying the centre-frequency, pass-band/stop-band attenuation as well as the signal bandwidth are presented. These topologies are compared in terms of their signal-to-noise ratios, hardware complexity, stability, tonality and sensitivity to non-idealities. Detailed simulations performed at the behavioural-level in MATLAB are compared with the experimental results of the FPGA implementation of the designed modulators. The signal-to-noise ratios between the simulated and empirical results are shown to be different by not more than 3-5 dBs. Furthermore, this paper presents the mathematical modelling and evaluation of the tones caused by the finite wordlengths of these digital multi-path sigma-delta modulators when excited by sinusoidal input signals

Design, analysis and evaluation of sigma-delta based beamformers for medical ultrasound imaging applications

The inherent analogue nature of medical ultrasound signals in conjunction with the abundant merits provided by digital image acquisition, together with the increasing use of relatively simple front-end circuitries, have created considerable demand for single-bit beamformers in digital ultrasound imaging systems. Furthermore, the increasing need to design lightweight ultrasound systems with low power consumption and low noise, provide ample justification for development and innovation in the use of single-bit beamformers in ultrasound imaging systems. The overall aim of this research program is to investigate, establish, develop and confirm through a combination of theoretical analysis and detailed simulations, that utilize raw phantom data sets, suitable techniques for the design of simple-to-implement hardware efficient digital ultrasound beamformers to address the requirements for 3D scanners with large channel counts, as well as portable and lightweight ultrasound scanners for point-of-care applications and intravascular imaging systems. In addition, the stability boundaries of higher-order High-Pass (HP) and Band-Pass (BP) Σ−Δ modulators for single- and dual- sinusoidal inputs are determined using quasi-linear modeling together with the describing-function method, to more accurately model the modulator quantizer. The theoretical results are shown to be in good agreement with the simulation results for a variety of input amplitudes, bandwidths, and modulator orders. The proposed mathematical models of the quantizer will immensely help speed up the design of higher order HP and BP Σ−Δ modulators to be applicable for digital ultrasound beamformers. Finally, a user friendly design and performance evaluation tool for LP, BP and HP modulators is developed. This toolbox, which uses various design methodologies and covers an assortment of modulators topologies, is intended to accelerate the design process and evaluation of modulators. This design tool is further developed to enable the design, analysis and evaluation of beamformer structures including the noise analyses of the final B-scan images. Thus, this tool will allow researchers and practitioners to design and verify different reconstruction filters and analyze the results directly on the B-scan ultrasound images thereby saving considerable time and effort