7,985 research outputs found
Satisfiability-Based Algorithms for Boolean Optimization
This paper proposes new algorithms for the Binate Covering Problem (BCP), a well-known restriction of Boolean Optimization. Binate Covering finds application in many areas of Computer Science and Engineering. In Artificial Intelligence, BCP can be used for computing minimum-size prime implicants of Boolean functions, of interest in Automated Reasoning and Non-Monotonic Reasoning. Moreover, Binate Covering is an essential modeling tool in Electronic Design Automation. The objectives of the paper are to briefly review branch-and-bound algorithms for BCP, to describe how to apply backtrack search pruning techniques from the Boolean Satisfiability (SAT) domain to BCP, and to illustrate how to strengthen those pruning techniques by exploiting the actual formulation of BCP. Experimental results, obtained on representative instances indicate that the proposed techniques provide significant performance gains for a large number of problem instances
Layout Decomposition for Quadruple Patterning Lithography and Beyond
For next-generation technology nodes, multiple patterning lithography (MPL)
has emerged as a key solution, e.g., triple patterning lithography (TPL) for
14/11nm, and quadruple patterning lithography (QPL) for sub-10nm. In this
paper, we propose a generic and robust layout decomposition framework for QPL,
which can be further extended to handle any general K-patterning lithography
(K4). Our framework is based on the semidefinite programming (SDP)
formulation with novel coloring encoding. Meanwhile, we propose fast yet
effective coloring assignment and achieve significant speedup. To our best
knowledge, this is the first work on the general multiple patterning
lithography layout decomposition.Comment: DAC'201
An Overview of Backtrack Search Satisfiability Algorithms
Propositional Satisfiability (SAT) is often used as the underlying model for a significan
Effective Lower Bounding Techniques for Pseudo-Boolean Optimization
Linear Pseudo-Boolean Optimization (PBO) is a widely used modeling framework in Electronic Design Automation (EDA). Due to significant advances in Boolean Satisfiability (SAT), new algorithms for PBO have emerged, which are effective on highly constrained instances. However, these algorithms fail to handle effectively the information provided by the cost function of PBO. This paper addresses the integration of lower bound estimation methods with SAT-related techniques in PBO solvers. Moreover, the paper shows that the utilization of lower bound estimates can dramatically improve the overall performance of PBO solvers for most existing benchmarks from EDA. 1
Automated Termination Analysis for Logic Programs with Cut
Termination is an important and well-studied property for logic programs.
However, almost all approaches for automated termination analysis focus on
definite logic programs, whereas real-world Prolog programs typically use the
cut operator. We introduce a novel pre-processing method which automatically
transforms Prolog programs into logic programs without cuts, where termination
of the cut-free program implies termination of the original program. Hence
after this pre-processing, any technique for proving termination of definite
logic programs can be applied. We implemented this pre-processing in our
termination prover AProVE and evaluated it successfully with extensive
experiments
Efficient data structures for backtrack search SAT solvers
The implementation of efficient Propositional Satisfiability (SAT) solvers entails the utilization of highly efficient data structures, as illustrated by most of the recent state-of-the-art SAT solvers. However, it is in general hard to compare existing data structures, since different solvers are often characterized by fairly different algorithmic organizations and techniques, and by different search strategies and heuristics. This paper aims the evaluation of data structures for backtrack search SAT solvers, under a common unbiased SAT framework. In addition, advantages and drawbacks of each existing data structure are identified. Finally, new data structures are proposed, that are competitive with the most efficient data structures currently available, and that may be preferable for the next generation SAT solvers
CLPGUI: a generic graphical user interface for constraint logic programming over finite domains
CLPGUI is a graphical user interface for visualizing and interacting with
constraint logic programs over finite domains. In CLPGUI, the user can control
the execution of a CLP program through several views of constraints, of finite
domain variables and of the search tree. CLPGUI is intended to be used both for
teaching purposes, and for debugging and improving complex programs of
realworld scale. It is based on a client-server architecture for connecting the
CLP process to a Java-based GUI process. Communication by message passing
provides an open architecture which facilitates the reuse of graphical
components and the porting to different constraint programming systems.
Arbitrary constraints and goals can be posted incrementally from the GUI. We
propose several dynamic 2D and 3D visualizations of the search tree and of the
evolution of finite domain variables. We argue that the 3D representation of
search trees proposed in this paper provides the most appropriate visualization
of large search trees. We describe the current implementation of the
annotations and of the interactive execution model in GNU-Prolog, and report
some evaluation results.Comment: 16 pages; Alexandre Tessier, editor; WLPE 2002,
http://xxx.lanl.gov/abs/cs.SE/020705
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