An algorithm for compositional nonblocking verification of extended finite-state machines

This paper describes an approach for compositional nonblocking verification of discrete event systems modelled as extended finite-state machines (EFSM). Previous results about finite-state machines in lock-step synchronisation are generalised and applied to EFSMs communicating via shared variables. This gives rise to an EFSM-based conflict check algorithm that composes EFSMs gradually and partially unfolds variables as needed. At each step, components are simplified using conflict-equivalence preserving abstraction. The algorithm has been implemented in the discrete event systems tool Supremica. The paper presents experimental results for the verification of two scalable manufacturing system models, and shows that the EFSM-based algorithm verifies some large models faster than previously used methods

Scaling BDD-based timed verification with simulation reduction

Digitization is a technique that has been widely used in real-time model checking. With the assumption of digital clocks, symbolic model checking techniques (like those based on BDDs) can be applied for real-time systems. The problem of model checking real-time systems based on digitization is that the number of tick transitions increases rapidly with the increment of clock upper bounds. In this paper, we propose to improve BDD-based verification for real-time systems using simulation reduction. We show that simulation reduction allows us to verify timed automata with large clock upper bounds and to converge faster to the fixpoint. The presented approach is applied to reachability and LTL verification for real-time systems. Finally, we compare our approach with existing tools such as Rabbit, Uppaal, and CTAV and show that our approach outperforms them and achieves a significant speedup.No Full Tex

Compositional Performance Modelling with the TIPPtool

Stochastic process algebras have been proposed as compositional specification formalisms for performance models. In this paper, we describe a tool which aims at realising all beneficial aspects of compositional performance modelling, the TIPPtool. It incorporates methods for compositional specification as well as solution, based on state-of-the-art techniques, and wrapped in a user-friendly graphical front end. Apart from highlighting the general benefits of the tool, we also discuss some lessons learned during development and application of the TIPPtool. A non-trivial model of a real life communication system serves as a case study to illustrate benefits and limitations

A Uniform Mathematical Representation of Logic and Computation.

The current models of computation share varying levels of correspondence with actual implementation schemes. They can be arranged in a hierarchical structure depending upon their level of abstraction. In classical computing, the circuit model shares closest correspondence with physical implementation, followed by finite automata techniques. The highest level in the abstraction hierarchy is that of the theory of computation.Likewise, there exist computing paradigms based upon a different set of defining principles. The classical paradigm involves computing as has been applied traditionally, and is characterized by Boolean circuits that are irreversible in nature. The reversible paradigm requires invertible primitives in order to perform computation. The paradigm of quantum computing applies the theory of quantum mechanics to perform computational tasks.Our analysis concludes that descriptions at lowest level in the abstraction hierarchy should be uniform across the three paradigms, but the same is not true in case of current descriptions. We propose a mathematical representation of logic and computation that successfully explains computing models in all three paradigms, while making a seamless transition to higher levels of the abstraction hierarchy. This representation is based upon the theory of linear spaces and, hence, is referred to as the linear representation. The representation is first developed in the classical context, followed by an extension to the reversible paradigm by exploiting the well-developed theory on invertible mappings. The quantum paradigm is reconciled with this representation through correspondence that unitary operators share with the proposed linear representation. In this manner, the representation is shown to account for all three paradigms. The correspondence shared with finite automata models is also shown to hold implicitly during the development of this representation. Most importantly, the linear representation accounts for the Hamiltonians that define the dynamics of a computational process, thereby resolving the correspondence shared with underlying physical principles.The consistency of the linear representation is checked against a current existing application in VLSI CAD that exploits the linearity of logic functions for symbolic representation of circuits. Some possible applications and applicability of the linear representation to some open problems are also discussed

A framework for compositional nonblocking verification of extended finite-state machines

This paper presents a framework for compositional nonblocking verification of discrete event systems modelled as extended finite-state machines (EFSM). Previous results are improved to consider general conflict-equivalence based abstractions of EFSMs communicating both via shared variables and events. Performance issues resulting from the conversion of EFSM systems to finite-state machine systems are avoided by operating directly on EFSMs, deferring the unfolding of variables into state machines as long as possible. Several additional methods to abstract EFSMs and remove events are also presented. The proposed algorithm has been implemented in the discrete event systems tool Supremica, and the paper presents experimental results for several large EFSM models that can be verified faster than by previously used methods

Advances in Functional Decomposition: Theory and Applications

Functional decomposition aims at finding efficient representations for Boolean functions. It is used in many applications, including multi-level logic synthesis, formal verification, and testing. This dissertation presents novel heuristic algorithms for functional decomposition. These algorithms take advantage of suitable representations of the Boolean functions in order to be efficient. The first two algorithms compute simple-disjoint and disjoint-support decompositions. They are based on representing the target function by a Reduced Ordered Binary Decision Diagram (BDD). Unlike other BDD-based algorithms, the presented ones can deal with larger target functions and produce more decompositions without requiring expensive manipulations of the representation, particularly BDD reordering. The third algorithm also finds disjoint-support decompositions, but it is based on a technique which integrates circuit graph analysis and BDD-based decomposition. The combination of the two approaches results in an algorithm which is more robust than a purely BDD-based one, and that improves both the quality of the results and the running time. The fourth algorithm uses circuit graph analysis to obtain non-disjoint decompositions. We show that the problem of computing non-disjoint decompositions can be reduced to the problem of computing multiple-vertex dominators. We also prove that multiple-vertex dominators can be found in polynomial time. This result is important because there is no known polynomial time algorithm for computing all non-disjoint decompositions of a Boolean function. The fifth algorithm provides an efficient means to decompose a function at the circuit graph level, by using information derived from a BDD representation. This is done without the expensive circuit re-synthesis normally associated with BDD-based decomposition approaches. Finally we present two publications that resulted from the many detours we have taken along the winding path of our research