MILO : a microarchitecture and logic optimizer

In this report we discuss strengths and weaknesses of logic synthesis systems and describe a system for microarchitectural and logic optimization. Our system uses a set of algorithms for synthesizing SSI/MSI macros from parameterized microarchitecture components. In addition, it uses rules for optimizing both at the microarchitecture and logic level. The system increases designer productivity and requires less design knowledge and experience from circuit engineers

A bibliography on formal methods for system specification, design and validation

Literature on the specification, design, verification, testing, and evaluation of avionics systems was surveyed, providing 655 citations. Journal papers, conference papers, and technical reports are included. Manual and computer-based methods were employed. Keywords used in the online search are listed

A Generic Synthesis Algorithm for Well-Defined Parametric Design

This paper aims to improve the way synthesis tools can be built by formalizing: 1) the design artefact, 2) related knowledge and 3) an algorithm to generate solutions. This paper focuses on well-defined parametric engineering design, ranging from machine elements to industrial products. A design artefact is formalized in terms of parameters and topology elements. The knowledge is classified in three types: resolving rules to determine parameter values, constraining rules to restrict parameter values and expansion rules to add elements to the topology. A synthesis algorithm, based on an opportunistic design strategy, is described and tested for three design cases

Vision-Based Road Detection in Automotive Systems: A Real-Time Expectation-Driven Approach

The main aim of this work is the development of a vision-based road detection system fast enough to cope with the difficult real-time constraints imposed by moving vehicle applications. The hardware platform, a special-purpose massively parallel system, has been chosen to minimize system production and operational costs. This paper presents a novel approach to expectation-driven low-level image segmentation, which can be mapped naturally onto mesh-connected massively parallel SIMD architectures capable of handling hierarchical data structures. The input image is assumed to contain a distorted version of a given template; a multiresolution stretching process is used to reshape the original template in accordance with the acquired image content, minimizing a potential function. The distorted template is the process output.Comment: See http://www.jair.org/ for any accompanying file