MISSED: an environment for mixed-signal microsystem testing and diagnosis

A tight link between design and test data is proposed for speeding up test-pattern generation and diagnosis during mixed-signal prototype verification. Test requirements are already incorporated at the behavioral level and specified with increased detail at lower hierarchical levels. A strict distinction between generic routines and implementation data makes reuse of software possible. A testability-analysis tool and test and DFT libraries support the designer to guarantee testability. Hierarchical backtrace procedures in combination with an expert system and fault libraries assist the designer during mixed-signal chip debuggin

Behavioral Modelling of Digital Devices Via Composite Local-Linear State-Space Relations

This paper addresses the generation of accurate and efficient behavioral models of digital ICs. The proposed approach is based on the approximation of the device port characteristics by means of composite local linear state-space relations whose parameters can effectively be estimated from device port transient responses via well-established system identification techniques. The proposedmodels have been proven to overcome some inherent limitations of the state-of-the-art models used so far, and they can effectively be implemented in any commercial tool as Simulation Program with Integrated Circuit Emphasis (SPICE) subcircuits or VHDL-AMS hardware descriptions. A systematic study of the performances of the proposed state-space models is carried out on a synthetic test device. The effectiveness of the proposed approach has been demonstrated on a real application problem involving commercial devices and a data link of a mobile phon

NEXT-100 Technical Design Report (TDR). Executive Summary

In this Technical Design Report (TDR) we describe the NEXT-100 detector that will search for neutrinoless double beta decay (bbonu) in Xe-136 at the Laboratorio Subterraneo de Canfranc (LSC), in Spain. The document formalizes the design presented in our Conceptual Design Report (CDR): an electroluminescence time projection chamber, with separate readout planes for calorimetry and tracking, located, respectively, behind cathode and anode. The detector is designed to hold a maximum of about 150 kg of xenon at 15 bar, or 100 kg at 10 bar. This option builds in the capability to increase the total isotope mass by 50% while keeping the operating pressure at a manageable level. The readout plane performing the energy measurement is composed of Hamamatsu R11410-10 photomultipliers, specially designed for operation in low-background, xenon-based detectors. Each individual PMT will be isolated from the gas by an individual, pressure resistant enclosure and will be coupled to the sensitive volume through a sapphire window. The tracking plane consists in an array of Hamamatsu S10362-11-050P MPPCs used as tracking pixels. They will be arranged in square boards holding 64 sensors (8 times8) with a 1-cm pitch. The inner walls of the TPC, the sapphire windows and the boards holding the MPPCs will be coated with tetraphenyl butadiene (TPB), a wavelength shifter, to improve the light collection.Comment: 32 pages, 22 figures, 5 table

Quaternary pulse position modulation electronics for free-space laser communications

The development of a high data-rate communications electronic subsystem for future application in free-space, direct-detection laser communications is described. The dual channel subsystem uses quaternary pulse position modulation (QPPM) and operates at a throughput of 650 megabits per second. Transmitting functions described include source data multiplexing, channel data multiplexing, and QPPM symbol encoding. Implementation of a prototype version in discrete gallium arsenide logic, radiofrequency components, and microstrip circuitry is presented

Tracking and data system support for Surveyor mission 5, volume 3

Surveyor 5 tracking and data system activities evaluated from planning to final flight stage

MIDAS: Automated Approach to Design Microwave Integrated Inductors and Transformers on Silicon

The design of modern radiofrequency integrated circuits on silicon operating at microwave and millimeter-waves requires the integration of several spiral inductors and transformers that are not commonly available in the process design-kits of the technologies. In this work we present an auxiliary CAD tool for Microwave Inductor (and transformer) Design Automation on Silicon (MIDAS) that exploits commercial simulators and allows the implementation of an automatic design flow, including three-dimensional layout editing and electromagnetic simulations. In detail, MIDAS allows the designer to derive a preliminary sizing of the inductor (transformer) on the bases of the design entries (specifications). It draws the inductor (transformer) layers for the specific process design kit, including vias and underpasses, with or without patterned ground shield, and launches the electromagnetic simulations, achieving effective design automation with respect to the traditional design flow for RFICs. With the present software suite the complete design time is reduced significantly (typically 1 hour on a PC based on Intel® Pentium® Dual 1.80GHz CPU with 2-GB RAM). Afterwards both the device equivalent circuit and the layout are ready to be imported in the Cadence environment

High-Speed Communications Over Polymer Optical Fibers for In-Building Cabling and Home Networking

This paper focuses on high-speed cabling using polymer optical fibers (POF) in home networking. In particular, we report about the results obtained in the POF-ALL European Project, which is relevant to the Sixth Framework Program, and after two years of the European Project POF-PLUS, which is relevant to the Seventh Framework Program, focusing on their research activities about the use of poly-metyl-metha-acrilate step-index optical fibers for home applications. In particular, for that which concerns POF-ALL, we will describe eight-level pulse amplitude modulation (8-PAM) and orthogonal frequency-division multiplexing (OFDM) approaches for 100-Mb/s transmission over a target distance of 300 m, while for that which concerns POF-PLUS, we will describe a fully digital and a mixed analog-digital solution, both based on intensity modulation direct detection, for transmitting 1 Gb/s over a target distance of 50 m. The ultimate experimental results from the POF-ALL project will be given, while for POF-PLUS, which is still ongoing, we will only show our most recent preliminary results

IUS/payload communication system simulator configuration definition study

The requirements and specifications for a general purpose payload communications system simulator to be used to emulate those communications system portions of NASA and DOD payloads/spacecraft that will in the future be carried into earth orbit by the shuttle are discussed. For the purpose of on-orbit checkout, the shuttle is required to communicate with the payloads while they are physically located within the shuttle bay (attached) and within a range of 20 miles from the shuttle after they have been deployed (detached). Many of the payloads are also under development (and many have yet to be defined), actual payload communication hardware will not be available within the time frame during which the avionic hardware tests will be conducted. Thus, a flexible payload communication system simulator is required

Design of a fault tolerant airborne digital computer. Volume 2: Computational requirements and technology

This final report summarizes the work on the design of a fault tolerant digital computer for aircraft. Volume 2 is composed of two parts. Part 1 is concerned with the computational requirements associated with an advanced commercial aircraft. Part 2 reviews the technology that will be available for the implementation of the computer in the 1975-1985 period. With regard to the computation task 26 computations have been categorized according to computational load, memory requirements, criticality, permitted down-time, and the need to save data in order to effect a roll-back. The technology part stresses the impact of large scale integration (LSI) on the realization of logic and memory. Also considered was module interconnection possibilities so as to minimize fault propagation

FOSS as an efficient tool for extraction of MOSFET compact model parameters

A GNU Octave - based application for device-level compact model evaluation and parameter extraction has been developed. The applications main features are as follows: experimental I-V data importing, generating input data for different circuit simulation programs, running the simulation program to calculate I-V characteristics of the specified models, calculating model misfit and its sensitivity to selected parameter variation, and the comparison of experimental and simulated characteristics. Measured I-V data stored by different measurement systems are accepted. Circuit simulations may be done with Ngspice, Qucs and LTSpiceIV © . Selected aspects of the application are presented and discussed