934 research outputs found

    Predicting potential customer needs and wants for agile design and manufacture in an industry 4.0 environment

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    Manufacturing is currently experiencing a paradigm shift in the way that products are designed, produced and serviced. Such changes are brought about mainly by the extensive use of the Internet and digital technologies. As a result of this shift, a new industrial revolution is emerging, termed “Industry 4.0” (i4), which promises to accommodate mass customisation at a mass production cost. For i4 to become a reality, however, multiple challenges need to be addressed, highlighting the need for design for agile manufacturing and, for this, a framework capable of integrating big data analytics arising from the service end, business informatics through the manufacturing process, and artificial intelligence (AI) for the entire manufacturing value chain. This thesis attempts to address these issues, with a focus on the need for design for agile manufacturing. First, the state of the art in this field of research is reviewed on combining cutting-edge technologies in digital manufacturing with big data analysed to support agile manufacturing. Then, the work is focused on developing an AI-based framework to address one of the customisation issues in smart design and agile manufacturing, that is, prediction of potential customer needs and wants. With this framework, an AI-based approach is developed to predict design attributes that would help manufacturers to decide the best virtual designs to meet emerging customer needs and wants predictively. In particular, various machine learning approaches are developed to help explain at least 85% of the design variance when building a model to predict potential customer needs and wants. These approaches include k-means clustering, self-organizing maps, fuzzy k-means clustering, and decision trees, all supporting a vector machine to evaluate and extract conscious and subconscious customer needs and wants. A model capable of accurately predicting customer needs and wants for at least 85% of classified design attributes is thus obtained. Further, an analysis capable of determining the best design attributes and features for predicting customer needs and wants is also achieved. As the information analysed can be utilized to advise the selection of desired attributes, it is fed back in a closed-loop of the manufacturing value chain: design → manufacture → management/service → → → design... For this, a total of 4 case studies are undertaken to test and demonstrate the efficacy and effectiveness of the framework developed. These case studies include: 1) an evaluation model of consumer cars with multiple attributes including categorical and numerical ones; 2) specifications of automotive vehicles in terms of various characteristics including categorical and numerical instances; 3) fuel consumptions of various car models and makes, taking into account a desire for low fuel costs and low CO2 emissions; and 4) computer parts design for recommending the best design attributes when buying a computer. The results show that the decision trees, as a machine learning approach, work best in predicting customer needs and wants for smart design. With the tested framework and methodology, this thesis overall presents a holistic attempt to addressing the missing gap between manufacture and customisation, that is meeting customer needs and wants. Effective ways of achieving customization for i4 and smart manufacturing are identified. This is achieved through predicting potential customer needs and wants and applying the prediction at the product design stage for agile manufacturing to meet individual requirements at a mass production cost. Such agility is one key element in realising Industry 4.0. At the end, this thesis contributes to improving the process of analysing the data to predict potential customer needs and wants to be used as inputs to customizing product designs agilely

    Hardware thread management modeling for precision timed processors

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    Studies recently and currently in progress address timing demands for Cyber Physical Systems (CPS) applications. Certain areas of research seek to modify modern computer architecture to meet the needs of CPS applications. Moreover, specific modifications in current computer architecture have produced newer computer architectures and processors, such as precision timed (PRET) processors. This thesis focuses on identifying, modeling, and simulating thread management methods in hardware used by the current open-source PRET soft processor, the MultiFire

    Automated Machine Learning for Multi-Label Classification

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    MicroWalk: A Framework for Finding Side Channels in Binaries

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    Microarchitectural side channels expose unprotected software to information leakage attacks where a software adversary is able to track runtime behavior of a benign process and steal secrets such as cryptographic keys. As suggested by incremental software patches for the RSA algorithm against variants of side-channel attacks within different versions of cryptographic libraries, protecting security-critical algorithms against side channels is an intricate task. Software protections avoid leakages by operating in constant time with a uniform resource usage pattern independent of the processed secret. In this respect, automated testing and verification of software binaries for leakage-free behavior is of importance, particularly when the source code is not available. In this work, we propose a novel technique based on Dynamic Binary Instrumentation and Mutual Information Analysis to efficiently locate and quantify memory based and control-flow based microarchitectural leakages. We develop a software framework named \tool~for side-channel analysis of binaries which can be extended to support new classes of leakage. For the first time, by utilizing \tool, we perform rigorous leakage analysis of two widely-used closed-source cryptographic libraries: \emph{Intel IPP} and \emph{Microsoft CNG}. We analyze 1515 different cryptographic implementations consisting of 112112 million instructions in about 105105 minutes of CPU time. By locating previously unknown leakages in hardened implementations, our results suggest that \tool~can efficiently find microarchitectural leakages in software binaries

    Parallelization of dynamic programming recurrences in computational biology

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    The rapid growth of biosequence databases over the last decade has led to a performance bottleneck in the applications analyzing them. In particular, over the last five years DNA sequencing capacity of next-generation sequencers has been doubling every six months as costs have plummeted. The data produced by these sequencers is overwhelming traditional compute systems. We believe that in the future compute performance, not sequencing, will become the bottleneck in advancing genome science. In this work, we investigate novel computing platforms to accelerate dynamic programming algorithms, which are popular in bioinformatics workloads. We study algorithm-specific hardware architectures that exploit fine-grained parallelism in dynamic programming kernels using field-programmable gate arrays: FPGAs). We advocate a high-level synthesis approach, using the recurrence equation abstraction to represent dynamic programming and polyhedral analysis to exploit parallelism. We suggest a novel technique within the polyhedral model to optimize for throughput by pipelining independent computations on an array. This design technique improves on the state of the art, which builds latency-optimal arrays. We also suggest a method to dynamically switch between a family of designs using FPGA reconfiguration to achieve a significant performance boost. We have used polyhedral methods to parallelize the Nussinov RNA folding algorithm to build a family of accelerators that can trade resources for parallelism and are between 15-130x faster than a modern dual core CPU implementation. A Zuker RNA folding accelerator we built on a single workstation with four Xilinx Virtex 4 FPGAs outperforms 198 3 GHz Intel Core 2 Duo processors. Furthermore, our design running on a single FPGA is an order of magnitude faster than competing implementations on similar-generation FPGAs and graphics processors. Our work is a step toward the goal of automated synthesis of hardware accelerators for dynamic programming algorithms

    Small business innovation research. Abstracts of 1988 phase 1 awards

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    Non-proprietary proposal abstracts of Phase 1 Small Business Innovation Research (SBIR) projects supported by NASA are presented. Projects in the fields of aeronautical propulsion, aerodynamics, acoustics, aircraft systems, materials and structures, teleoperators and robots, computer sciences, information systems, data processing, spacecraft propulsion, bioastronautics, satellite communication, and space processing are covered

    NASA Space Engineering Research Center for VLSI System Design

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    This annual report outlines the activities of the past year at the NASA SERC on VLSI Design. Highlights for this year include the following: a significant breakthrough was achieved in utilizing commercial IC foundries for producing flight electronics; the first two flight qualified chips were designed, fabricated, and tested and are now being delivered into NASA flight systems; and a new technology transfer mechanism has been established to transfer VLSI advances into NASA and commercial systems

    ASC: A stream compiler for computing with FPGAs

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    Automatic Algorithm Selection for Complex Simulation Problems

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    To select the most suitable simulation algorithm for a given task is often difficult. This is due to intricate interactions between model features, implementation details, and runtime environment, which may strongly affect the overall performance. The thesis consists of three parts. The first part surveys existing approaches to solve the algorithm selection problem and discusses techniques to analyze simulation algorithm performance.The second part introduces a software framework for automatic simulation algorithm selection, which is evaluated in the third part.Die Auswahl des passendsten Simulationsalgorithmus fĂĽr eine bestimmte Aufgabe ist oftmals schwierig. Dies liegt an der komplexen Interaktion zwischen Modelleigenschaften, Implementierungsdetails und Laufzeitumgebung. Die Arbeit ist in drei Teile gegliedert. Der erste Teil befasst sich eingehend mit Vorarbeiten zur automatischen Algorithmenauswahl, sowie mit der Leistungsanalyse von Simulationsalgorithmen. Der zweite Teil der Arbeit stellt ein Rahmenwerk zur automatischen Auswahl von Simulationsalgorithmen vor, welches dann im dritten Teil evaluiert wird
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