Switched-capacitor silicon compiler

A switched-capacitor (SC) silicon compiler will be described in this report. The input to this system is a set of specifications and a circuit description of an SC block. It has an opamp synthesis tool which is based on the selection and assembly of primitive modules. The opamp circuit topology is formed by searching through a set of styles yielding high performance opamp circuits serving a wide range of SC network applications. The layout strategy and architecture are such that they eliminate any crossover of sensitive signals by insensitive signals; Thus avoiding any special routing algorithm for sensitive routing. The results is a compact, parasitic-insensitive and "standard cell" type layout of an SC block with user-defined height. All blocks are placed and routed together by a general auto-placement and router tool

Arc-discharge In Solution: A Novel Synthesis Method For Carbon Nanotubes And In Situ Decoration Of Carbon Nanotubes With Nanoparticles

Nanotechnology has reached the status of the 21st century\u27s leading science and technology based on fundamental and applied research during the last two decades. An important feature of nanotechnology is to bridge the crucial dimensional gap between the atomic and molecular fundamental sciences and microstructural scale of engineering. Accordingly, it is very important to have an in-depth understanding of the synthesis of nanomaterials for the use of state-of-the-art high technological devices with enhanced properties. Recently, the \u27bottom-up\u27 approach for the fabrication of nanomaterials has received a great deal of attention for its simplicity and cost effectiveness. Tailoring the various parameters during synthesis of selected nanoparticles can be used to fabricate technologically important components. During the last decade, carbon nanotubes (CNTs) have been envisioned for a host of different new applications. Although carbon nanotubes can be synthesized using a variety of techniques, large-scale synthesis is still a great challenge to the researchers. Three methods are commonly used for commercial and bulk productions of carbon nanotubes: arc-discharge, chemical vapor deposition and laser ablation. However, low-cost, large-scale production of high-quality carbon nanotubes is yet to be reported. One of the objectives of the present research is to develop a simplified synthesis method for the production of large-scale, low-cost carbon nanotubes with functionality. Herein, a unique, simple, inexpensive and one-step synthesis route of CNTs and CNTs decorated with nanoparticles is reported. The method is simple arc-discharge in solution (ADS). For this new method, a full-fledged optoelectronically controlled instrumen is reported here to achieve high efficiency and continuous bulk production of CNTs. In this system, a constant gap between the two electrodes is maintained using a photosensor which allows a continuous synthesis of the carbon nanostructures. The system operates in a feedback loop consisting of an electrode-gap detector and an analogue electronic unit, as controller. This computerized feed system was also used in single process step to produce in situ-decorated CNTs with a variety of industrially important nanoparticles. To name a few, we have successfully synthesized CNTs decorated with 3-4 nm ceria, silica and palladium nanoparticles for many industrially relevant applications. This process can be extended to synthesize decorated CNTs with other oxide and metallic nanoparticles. Sixty experimental runs were carried out for parametric analysis varying process parameters including voltage, current and precursors. The amount of yield with time, rate of erosion of the anode, and rate of deposition of carbonaceous materials on the cathode electrode were investigated. Normalized kinetic parameters were evaluated for different amperes from the sets of runs. The production rate of pristine CNT at 75 A is as high as 5.89 ± 0.28 g.min-1. In this study, major emphasis was given on the characterizations of CNTs with and without nanoparticles using various techniques for surface and bulk analysis of the nanostructures. The nanostructures were characterized using transmission electron microscopy, high resolution transmission electron microscopy, scanning transmission electron microscopy, energy dispersive spectroscopy and scanning electron microscopy, x-ray photo electron spectroscopy, x-ray diffraction studies, and surface area analysis. Electron microscopy investigations show that the CNTs, collected from the water and solutions, are highly pure except the presence of some amorphous carbon. Thermogravimetric analysis and chemical oxidation data of CNTs show the good agreement with electron microscopy analysis. The surface area analysis depicts very high surface area. For pristine multi-walled carbon nanotubes, the BET surface area is approximately 80 m2.g-1. X-ray diffraction studies on carbon nanotubes shows that the products are clean. Nano-sized palladium decorated carbon nanotubes are supposed to be very efficient for hydrogen storage. The synthesis for in-situ decoration of palladium nanoparticles on carbon nanotubes using the arc discharge in solution process has been extensively carried out for possible hydrogen storage applications and electronic device fabrication. Palladium nanoparticles were found to form during the reduction of palladium tetra-chloro-square planar complex. The formation of such a complex was investigated using ultraviolet-visible spectroscopic method. Pd-nanoparticles were simultaneously decorated on carbon nanotubes during the rolling of graphene sheets in the arc-discharge process. Zero-loss energy filtered transmission electron microscopy and scanning transmission electron microscopy confirm the presence of 3 nm palladium nanoparticles. The deconvoluted X-ray photoelectron spectroscopy envelope shows the presence of palladium. Surface area measurements using BET method show a surface area of 28 m2.g-1. The discrepancy with pristine CNTs can be explained considering the density of palladium (12023 kg.m-3). Energy dispersive spectroscopy suggests no functionalization of chlorine to the sidewall of carbon nanotubes. The presence of dislodged graphene sheets with wavy morphology as observed with high-resolution transmission electron microscopy supports the formation of CNTs through the \u27scroll mechanism\u27

Program: Graduate Research Achievement Day 2019

Full program for 2019 Graduate School Achievement Day.https://digitalcommons.odu.edu/graduate_school/1001/thumbnail.jp

Generation of Application Specific Hardware Extensions for Hybrid Architectures: The Development of PIRANHA - A GCC Plugin for High-Level-Synthesis

Architectures combining a field programmable gate array (FPGA) and a general-purpose processor on a single chip became increasingly popular in recent years. On the one hand, such hybrid architectures facilitate the use of application specific hardware accelerators that improve the performance of the software on the host processor. On the other hand, it obliges system designers to handle the whole process of hardware/software co-design. The complexity of this process is still one of the main reasons, that hinders the widespread use of hybrid architectures. Thus, an automated process that aids programmers with the hardware/software partitioning and the generation of application specific accelerators is an important issue. The method presented in this thesis neither requires restrictions of the used high-level-language nor special source code annotations. Usually, this is an entry barrier for programmers without deeper understanding of the underlying hardware platform. This thesis introduces a seamless programming flow that allows generating hardware accelerators for unrestricted, legacy C code. The implementation consists of a GCC plugin that automatically identifies application hot-spots and generates hardware accelerators accordingly. Apart from the accelerator implementation in a hardware description language, the compiler plugin provides the generation of a host processor interfaces and, if necessary, a prototypical integration with the host operating system. An evaluation with typical embedded applications shows general benefits of the approach, but also reveals limiting factors that hamper possible performance improvements

Recent Advances in Embedded Computing, Intelligence and Applications

The latest proliferation of Internet of Things deployments and edge computing combined with artificial intelligence has led to new exciting application scenarios, where embedded digital devices are essential enablers. Moreover, new powerful and efficient devices are appearing to cope with workloads formerly reserved for the cloud, such as deep learning. These devices allow processing close to where data are generated, avoiding bottlenecks due to communication limitations. The efficient integration of hardware, software and artificial intelligence capabilities deployed in real sensing contexts empowers the edge intelligence paradigm, which will ultimately contribute to the fostering of the offloading processing functionalities to the edge. In this Special Issue, researchers have contributed nine peer-reviewed papers covering a wide range of topics in the area of edge intelligence. Among them are hardware-accelerated implementations of deep neural networks, IoT platforms for extreme edge computing, neuro-evolvable and neuromorphic machine learning, and embedded recommender systems

1995 BRAC Commission

Naval Research Lab: Special Facilities and Equipment Capability Data Call. Tabular data, memos, documents. Box 178, L-110

Student Research Colloquium Proceedings 2009

2009 Student Research Colloquium proceedings include the following: a schedule of the day\u27s events, acknowledgement of research sponsors, the day\u27s program, conference presentation abstracts, student presenter index, research sponsor index, planning committee, poster and paper presentation judges, registration desk, sponsors, and donors, map of Atwood Memorial Center. Keynote address on greenhouse gases, global demand for energy, and tomrorow\u27s technology to address these issues given by Dr. Sean Garrick, Associate Professor, Department of Mechanical Engineering, University of Minnesota. Sustainability Panel Discussion panelists: Dr. Anthony Akubue, Professor, Environmental and Technological Studies, St. Cloud State University; Dr. Sean Garrick, Associate Professor, Mechanical Engineering, University of Minnesota; Valerie Knopp, Assistant Director of Financial Aid, Offices of Scholarships and Financial Aid, St Cloud State University; Teresa A. Lamo-Nelson, Doctoral Candidate, Higher Education Administration, St. Cloud State University; Angela Olson, Assistant Professor, Aviation, St. Cloud State University; Dr. Tracy E. Ore, Associate Professor/Coordinator, Sociology and Anthropology/St Cloud State University Community Garden, Dr. Mitch Bender (Moderator), Associate Professor, Environmental and Technological Studies, St Cloud State University