Bit flipping decoding for binary product codes

Error control coding has been used to mitigate the impact of noise on the wireless channel. Today, wireless communication systems have in their design Forward Error Correction (FEC) techniques to help reduce the amount of retransmitted data. When designing a coding scheme, three challenges need to be addressed, the error correcting capability of the code, the decoding complexity of the code and the delay introduced by the coding scheme. While it is easy to design coding schemes with a large error correcting capability, it is a challenge finding decoding algorithms for these coding schemes. Generally increasing the length of a block code increases its error correcting capability and its decoding complexity. Product codes have been identified as a means to increase the block length of simpler codes, yet keep their decoding complexity low. Bit flipping decoding has been identified as simple to implement decoding algorithm. Research has generally been focused on improving bit flipping decoding for Low Density Parity Check codes. In this study we develop a new decoding algorithm based on syndrome checking and bit flipping to use for binary product codes, to address the major challenge of coding systems, i.e., developing codes with a large error correcting capability yet have a low decoding complexity. Simulated results show that the proposed decoding algorithm outperforms the conventional decoding algorithm proposed by P. Elias in BER and more significantly in WER performance. The algorithm offers comparable complexity to the conventional algorithm in the Rayleigh fading channel

Anticodes and error-correcting for digital data transmission

The work reported in this thesis is an investigation in the field of error-control coding. This subject is concerned with increasing the reliability of digital data transmission through a noisy medium, by coding the transmitted data. In this respect, an extension and development of a method for finding optimum and near-optimum codes, using N.m digital arrays known as anticodes, is established and described. The anticodes, which have opposite properties to their complementary related error-control codes, are disjoined fron the original maximal-length code, known as the parent anticode, to leave good linear block codes. The mathematical analysis of the parent anticode and as a result the mathematical analysis of its related anticodes has given some useful insight into the construction of a large number of optimum and near-optimum anticodes resulting respectively in a large number of optimum and near-optimum codes. This work has been devoted to the construction of anticodes from unit basic (small dimension) anticodes by means of various systematic construction and refinement techniques, which simplifies the construction of the associated linear block codes over a wide range of parameters. An extensive list of these anticodes and codes is given in the thesis. The work also has been extended to the construction of anticodes in which the symbols have been chosen from the elements of the finite field GF(q), and, in particular, a large number of optimum and near-optimum codes over GF(3) have been found. This generalises the concept of anticodes into the subject of multilevel codes

Some new results on majority-logic codes for correction of random errors

The main advantages of random error-correcting majority-logic codes and majority-logic decoding in general are well known and two-fold. Firstly, they offer a partial solution to a classical coding theory problem, that of decoder complexity. Secondly, a majority-logic decoder inherently corrects many more random error patterns than the minimum distance of the code implies is possible. The solution to the decoder complexity is only a partial one because there are circumstances under which a majority-logic decoder is too complex and expensive to implement. [Continues.

Codificación para corrección de errores con aplicación en sistemas de transmisión y almacenamiento de información

Tesis (DCI)--FCEFN-UNC, 2013Trata de una técnica de diseño de códigos de chequeo de paridad de baja densidad ( más conocidas por sigla en ingles como LDPC) y un nuevo algoritmo de post- procesamiento para la reducción del piso de erro

Méthodes de codage et d'estimation adaptative appliquées aux communications sans fil

Les recherches et les contributions présentées portent sur des techniques de traitement du signal appliquées aux communications sans fil. Elles s’articulent autour des points suivants : (1) l’estimation adaptative de canaux de communication dans différents contextes applicatifs, (2) la correction de bruit impulsionnel et la réduction du niveau de PAPR (Peak to Average Power Ratio) dans un système multi-porteuse, (3) l’optimisation de schémas de transmission pour la diffusion sur des canaux gaussiens avec/sans contrainte de sécurité, (4) l’analyse, l’interprétation et l’amélioration des algorithmes de décodage itératif par le biais de l’optimisation, de la théorie des jeux et des outils statistiques. L’accent est plus particulièrement mis sur le dernier thème