Long-term Stabilization of Fiber Laser Using Phase-locking Technique with Ultra-low Phase Noise and Phase Drift

We review the conventional phase-locking technique in the long-term stabilization of the mode-locked fiber laser and investigate the phase noise limitation of the conventional technique. To break the limitation, we propose an improved phase-locking technique with an optic-microwave phase detector in achieving the ultra-low phase noise and phase drift. The mechanism and the theoretical model of the novel phase-locking technique are also discussed. The long-term stabilization experiments demonstrate that the improved technique can achieve the long-term stabilization for the MLFL with ultra-low phase noise and phase drift. The excellent locking performance of the improved phase-locking technique implies that this technique can be used to stabilize the mode-locked fiber laser with the highly stable H-master or optical clock without stability loss

System architecture study of an orbital GPS user terminal

The generic RF and applications processing requirements for a GPS orbital navigator are considered. A line of demarcation between dedicated analog hardware, and software/processor implementation, maximizing the latter is discussed. A modular approach to R/PA design which permits several varieties of receiver to be constructed from basic components is described. It is a basic conclusion that software signal processing of the output of the baseband correlator is the best choice of transition from analog to digital signal processing. High performance sets requiring multiple channels are developed from a generic design by replicating the RF processing segment, and modifying the applications software to provide enhanced state propagation and estimation

Scaling Monte Carlo Tree Search on Intel Xeon Phi

Many algorithms have been parallelized successfully on the Intel Xeon Phi coprocessor, especially those with regular, balanced, and predictable data access patterns and instruction flows. Irregular and unbalanced algorithms are harder to parallelize efficiently. They are, for instance, present in artificial intelligence search algorithms such as Monte Carlo Tree Search (MCTS). In this paper we study the scaling behavior of MCTS, on a highly optimized real-world application, on real hardware. The Intel Xeon Phi allows shared memory scaling studies up to 61 cores and 244 hardware threads. We compare work-stealing (Cilk Plus and TBB) and work-sharing (FIFO scheduling) approaches. Interestingly, we find that a straightforward thread pool with a work-sharing FIFO queue shows the best performance. A crucial element for this high performance is the controlling of the grain size, an approach that we call Grain Size Controlled Parallel MCTS. Our subsequent comparing with the Xeon CPUs shows an even more comprehensible distinction in performance between different threading libraries. We achieve, to the best of our knowledge, the fastest implementation of a parallel MCTS on the 61 core Intel Xeon Phi using a real application (47 relative to a sequential run).Comment: 8 pages, 9 figure

Asynchronous Decoding of Error Potentials During the Monitoring of a Reaching Task

Brain-machine interfaces (BMIs) have demonstrated how they can be used for reaching tasks with both invasive and non-invasive signal recording methods. Despite the constant improvements in this field, there still exist diverse factors to overcome before achieving a natural control. In particular, the high variability of the brain signals often leads to the incorrect decoding of the subject intentions, producing unreliable behaviours in the controlled device. A possible solution to this problem would be that of correcting this erroneous decoding using a feedback signal from the user. In this work, we evaluate the possibility of decoding neural signals associated to performance monitoring (EEG-recorded error-related potentials) during a reaching task. Compared to previous works where these error potentials were recorded under scenarios with discrete movements performed by the cursor, under real conditions the cursor is moving continuously and thus the system is required to asynchronously detect any possible error. To this end, we simulated two different erroneous events during the monitoring of a reaching task: errors at the beginning of the movement, and errors happening in the middle of the trajectory being executed. Through the analysis of the recorded EEG of three subjects, we demonstrate the existence of neural correlates for the two types of elicited error potentials, and we are able to asynchronously detect them with high accuracies