Mapping RT-LOTOS specifications into Time Petri Nets

RT-LOTOS is a timed process algebra which enables compact and abstract specification of real-time systems. This paper proposes and illustrates a structural translation of RT-LOTOS terms into behaviorally equivalent (timed bisimilar) finite Time Petri nets. It is therefore possible to apply Time Petri nets verification techniques to the profit of RT-LOTOS. Our approach has been implemented in RTL2TPN, a prototype tool which takes as input an RT-LOTOS specification and outputs a TPN. The latter is verified using TINA, a TPN analyzer developed by LAAS-CNRS. The toolkit made of RTL2TPN and TINA has been positively benchmarked against previously developed RT-LOTOS verification tool

Effective representation of RT-LOTOS terms by finite time petri nets

The paper describes a transformational approach for the specification and formal verification of concurrent and real-time systems. At upper level, one system is specified using the timed process algebra RT-LOTOS. The output of the proposed transformation is a Time Petri net (TPN). The paper particularly shows how a TPN can be automatically constructed from an RT-LOTOS specification using a compositionally defined mapping. The proof of the translation consistency is sketched in the paper and developed in [1]. The RT-LOTOS to TPN translation patterns formalized in the paper are being implemented. in a prototype tool. This enables reusing TPNs verification techniques and tools for the profit of RT-LOTOS

Real-Time Estelle

Estelle is one of the standardized Formal Description Techniques for the specification of communication protocols and distributed systems. Unfortunately, Estelle is not capable to express real-time requirements or characteristics of services or protocols which is especially important in the context of distributed multimedia systems. In this paper, we introduce an extension to Estelle called Real-Time Estelle that allows to describe real-time systems. We introduce the syntax of the new language and propose both an operational and a descriptive semantics. Examples show the usefulness of the approach. We also discuss ways to implement Real-Time Estelle specifications

GaAs Implementation of FIR Filter

This thesis discusses the findings of the final year project involving Gallium Arsenide implementation of a triangular FIR filter to perform discrete wavelet transforms. The overall characteristics of Gallium Arsenide technology- its construction, behaviour and electrical charactersitics as they apply to VLSI technology - were investigated in this project. In depth understanding of its architecture is required to be able to understand the various design techniques employed. A comparison of Silicon and GaAs performance and other characteristics has also been made to fully justify the choice of this material for system implementation. A lot of research and active interest has gone into the field of image and video compression. Wavelet-based image transformation is one of the very efficient compression techniques used. An analysis of discrete wavelet transformations and the required triangular FIR filter was done to be able to produce a transform algorithm and the related filter architecture. Finally, the filter architecture was implemented as a VLSI design and layout. A variety of functional blocks required for the architecture were designed, tested and analysed. All these blocks were integrated to produce a model of a complete filter cell. The filter implementation was designed to be self-timed - without a system clock. Self-timed systems have considerable advantages over clocked architectures. Various design styles and handshaking mechanisms involved in designing a self-timed system were analysed and designed. There are many avenues still to explore. One of them is the VHDL analysis of filter architecture. Further development on this project would involve integration of higher-level logic and formation of a complete filter array

Quantitative Analysis of Apache Storm Applications: The NewsAsset Case Study

The development of Information Systems today faces the era of Big Data. Large volumes of information need to be processed in real-time, for example, for Facebook or Twitter analysis. This paper addresses the redesign of NewsAsset, a commercial product that helps journalists by providing services, which analyzes millions of media items from the social network in real-time. Technologies like Apache Storm can help enormously in this context. We have quantitatively analyzed the new design of NewsAsset to assess whether the introduction of Apache Storm can meet the demanding performance requirements of this media product. Our assessment approach, guided by the Unified Modeling Language (UML), takes advantage, for performance analysis, of the software designs already used for development. In addition, we converted UML into a domain-specific modeling language (DSML) for Apache Storm, thus creating a profile for Storm. Later, we transformed said DSML into an appropriate language for performance evaluation, specifically, stochastic Petri nets. The assessment ended with a successful software design that certainly met the scalability requirements of NewsAsset

Multimedia systems and real-time systems : some analogies and similarities

Colloque avec actes et comité de lecture. internationale.International audienceReal-time systems and Multimedia systems have been developed separately for along time. The vocabularies are different, but some concepts are similar and it seems now useful to analuse and compare these systems in order to define more generic or common solutions and understanding. The applications characteristics, the operating system mechanisms and the modelling techniques are analysed for both of these systems

Toward Specifying Multimedia Requirements Using a New Time Petri Net Model

In this paper, we define a model dedicated to the specification of multimedia applications called Pre-emptive Time Petri Nets with synchronizing transitions (STPTPN) as an extension of T-time Petri nets where time is associated with transitions. The model is proposed in the general purpose to model a large scale of multimedia requirements. Thus, resource requirement issues are discussed in this paper, and addressed in the model. To deal with, resources are modelled as special places using a new mechanism called “pre-emptor hyperarc” which lets a transition be “resource strongly-enabled”, “resource-violated” or “resource-violating”. Moreover, two additional mechanisms are considered: A time suspension mechanism uses inhibitor arcs associated with stopwatches and synchronization mechanisms allow the simultaneous firing of a set of transitions (called Rendezvous), according to different schemes. Compared to other existing models, our model is provided with an adapted semantic, designed to represent clearly and accurately time requirements, as well as the complex resource-pre-empting mechanisms that are observed in multimedia systems

Verification of timed circuits with failure-directed abstractions

Journal ArticleAbstract-This paper presents a method to address state explosion in timed-circuit verification by using abstraction directed by the failure model. This method allows us to decompose the verification problem into a set of subproblems, each of which proves that a specific failure condition does not occur. To each subproblem, abstraction is applied using safe transformations to reduce the complexity of verification. The abstraction preserves all essential behaviors conservatively for the specific failure model in the concrete description. Therefore, no violations of the given failure model are missed when only the abstract description is analyzed. An algorithm is also shown to examine the abstract error trace to either find a concrete error trace or report that it is a false negative. This paper presents results using the proposed failure-directed abstractions as applied to several large timed circuit designs