280 research outputs found
Asymmetric Error Correction and Flash-Memory Rewriting using Polar Codes
We propose efficient coding schemes for two communication settings: 1.
asymmetric channels, and 2. channels with an informed encoder. These settings
are important in non-volatile memories, as well as optical and broadcast
communication. The schemes are based on non-linear polar codes, and they build
on and improve recent work on these settings. In asymmetric channels, we tackle
the exponential storage requirement of previously known schemes, that resulted
from the use of large Boolean functions. We propose an improved scheme, that
achieves the capacity of asymmetric channels with polynomial computational
complexity and storage requirement.
The proposed non-linear scheme is then generalized to the setting of channel
coding with an informed encoder, using a multicoding technique. We consider
specific instances of the scheme for flash memories, that incorporate
error-correction capabilities together with rewriting. Since the considered
codes are non-linear, they eliminate the requirement of previously known
schemes (called polar write-once-memory codes) for shared randomness between
the encoder and the decoder. Finally, we mention that the multicoding scheme is
also useful for broadcast communication in Marton's region, improving upon
previous schemes for this setting.Comment: Submitted to IEEE Transactions on Information Theory. Partially
presented at ISIT 201
Rewriting Flash Memories by Message Passing
This paper constructs WOM codes that combine rewriting and error correction
for mitigating the reliability and the endurance problems in flash memory. We
consider a rewriting model that is of practical interest to flash applications
where only the second write uses WOM codes. Our WOM code construction is based
on binary erasure quantization with LDGM codes, where the rewriting uses
message passing and has potential to share the efficient hardware
implementations with LDPC codes in practice. We show that the coding scheme
achieves the capacity of the rewriting model. Extensive simulations show that
the rewriting performance of our scheme compares favorably with that of polar
WOM code in the rate region where high rewriting success probability is
desired. We further augment our coding schemes with error correction
capability. By drawing a connection to the conjugate code pairs studied in the
context of quantum error correction, we develop a general framework for
constructing error-correction WOM codes. Under this framework, we give an
explicit construction of WOM codes whose codewords are contained in BCH codes.Comment: Submitted to ISIT 201
Algorithms and Data Representations for Emerging Non-Volatile Memories
The evolution of data storage technologies has been extraordinary. Hard disk drives
that fit in current personal computers have the capacity that requires tons of transistors
to achieve in 1970s. Today, we are at the beginning of the era of non-volatile memory
(NVM). NVMs provide excellent performance such as random access, high I/O speed, low
power consumption, and so on. The storage density of NVMs keeps increasing following
Moore’s law. However, higher storage density also brings significant data reliability issues.
When chip geometries scale down, memory cells (e.g. transistors) are aligned much closer
to each other, and noise in the devices will become no longer negligible. Consequently,
data will be more prone to errors and devices will have much shorter longevity.
This dissertation focuses on mitigating the reliability and the endurance issues for two
major NVMs, namely, NAND flash memory and phase-change memory (PCM). Our main
research tools include a set of coding techniques for the communication channels implied
by flash memory and PCM. To approach the problems, at bit level we design error
correcting codes tailored for the asymmetric errors in flash and PCM, we propose joint
coding scheme for endurance and reliability, error scrubbing methods for controlling storage
channel quality, and study codes that are inherently resisting to typical errors in flash
and PCM; at higher levels, we are interested in analyzing the structures and the meanings
of the stored data, and propose methods that pass such metadata to help further improve
the coding performance at bit level. The highlights of this dissertation include the first
set of write-once memory code constructions which correct a significant number of errors,
a practical framework which corrects errors utilizing the redundancies in texts, the first
report of the performance of polar codes for flash memories, and the emulation of rank
modulation codes in NAND flash chips
Constructions of Rank Modulation Codes
Rank modulation is a way of encoding information to correct errors in flash
memory devices as well as impulse noise in transmission lines. Modeling rank
modulation involves construction of packings of the space of permutations
equipped with the Kendall tau distance.
We present several general constructions of codes in permutations that cover
a broad range of code parameters. In particular, we show a number of ways in
which conventional error-correcting codes can be modified to correct errors in
the Kendall space. Codes that we construct afford simple encoding and decoding
algorithms of essentially the same complexity as required to correct errors in
the Hamming metric. For instance, from binary BCH codes we obtain codes
correcting Kendall errors in memory cells that support the order of
messages, for any constant We also construct
families of codes that correct a number of errors that grows with at
varying rates, from to . One of our constructions
gives rise to a family of rank modulation codes for which the trade-off between
the number of messages and the number of correctable Kendall errors approaches
the optimal scaling rate. Finally, we list a number of possibilities for
constructing codes of finite length, and give examples of rank modulation codes
with specific parameters.Comment: Submitted to IEEE Transactions on Information Theor
Rank-Modulation Rewrite Coding for Flash Memories
The current flash memory technology focuses on the cost minimization of its static storage capacity. However, the resulting approach supports a relatively small number of program-erase cycles. This technology is effective for consumer devices (e.g., smartphones and cameras) where the number of program-erase cycles is small. However, it is not economical for enterprise storage systems that require a large number of lifetime writes. The proposed approach in this paper for alleviating this problem consists of the efficient integration of two key ideas: 1) improving reliability and endurance by representing the information using relative values via the rank modulation scheme and 2) increasing the overall (lifetime) capacity of the flash device via rewriting codes, namely, performing multiple writes per cell before erasure. This paper presents a new coding scheme that combines rank-modulation with rewriting. The key benefits of the new scheme include: 1) the ability to store close to 2 bit per cell on each write with minimal impact on the lifetime of the memory and 2) efficient encoding and decoding algorithms that make use of capacity-achieving write-once-memory codes that were proposed recently
Lossy Compression with Privacy Constraints: Optimality of Polar Codes
A lossy source coding problem with privacy constraint is studied in which two
correlated discrete sources and are compressed into a reconstruction
with some prescribed distortion . In addition, a privacy
constraint is specified as the equivocation between the lossy reconstruction
and . This models the situation where a certain amount of source
information from one user is provided as utility (given by the fidelity of its
reconstruction) to another user or the public, while some other correlated part
of the source information must be kept private. In this work, we show that
polar codes are able, possibly with the aid of time sharing, to achieve any
point in the optimal rate-distortion-equivocation region identified by
Yamamoto, thus providing a constructive scheme that obtains the optimal
tradeoff between utility and privacy in this framework.Comment: Submitted for publicatio
Error correction and partial information rewriting for flash memories
This paper considers the partial information rewriting problem for flash memories. In this problem, the state of information can only be updated to a limited number of new states, and errors may occur in memory cells between two adjacent updates. We propose two coding schemes based on the models of trajectory codes. The bounds on achievable code rates are shown using polar WOM coding. Our schemes generalize the existing rewriting codes in multiple ways, and can be applied to various practical scenarios such as file editing, log-based file systems and file synchronization systems
Towards Endurable, Reliable and Secure Flash Memories-a Coding Theory Application
Storage systems are experiencing a historical paradigm shift from hard disk to nonvolatile memories due to its advantages such as higher density, smaller size and non-volatility. On the other hand, Solid Storage Disk (SSD) also poses critical challenges to application and system designers. The first challenge is called endurance. Endurance means flash memory can only experience a limited number of program/erase cycles, and after that the cell quality degradation can no longer be accommodated by the memory system fault tolerance capacity. The second challenge is called reliability, which means flash cells are sensitive to various noise and disturbs, i.e., data may change unintentionally after experiencing noise/disturbs. The third challenge is called security, which means it is impossible or costly to delete files from flash memory securely without leaking information to possible eavesdroppers.
In this dissertation, we first study noise modeling and capacity analysis for NAND flash memories (which is the most popular flash memory in market), which gains us some insight on how flash memories are working and their unique noise. Second, based on the characteristics of content-replication codewords in flash memories, we propose a joint decoder to enhance the flash memory reliability. Third, we explore data representation schemes in flash memories and optimal rewriting code constructions in order to solve the endurance problem. Fourth, in order to make our rewriting code more practical, we study noisy write-efficient memories and Write-Once Memory (WOM) codes against inter-cell interference in NAND memories. Finally, motivated by the secure deletion problem in flash memories, we study coding schemes to solve both the endurance and the security issues in flash memories. This work presents a series of information theory and coding theory research studies on the aforesaid three critical issues, and shows that how coding theory can be utilized to address these challenges
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