255,135 research outputs found
The Fundamentals of Radar with Applications to Autonomous Vehicles
Radar systems can be extremely useful for applications in autonomous vehicles. This paper seeks to show how radar systems function and how they can apply to improve autonomous vehicles. First, the basics of radar systems are presented to introduce the basic terminology involved with radar. Then, the topic of phased arrays is presented because of their application to autonomous vehicles. The topic of digital signal processing is also discussed because of its importance for all modern radar systems. Finally, examples of radar systems based on the presented knowledge are discussed to illustrate the effectiveness of radar systems in autonomous vehicles
Nearfield Acoustic Holography using sparsity and compressive sampling principles
Regularization of the inverse problem is a complex issue when using
Near-field Acoustic Holography (NAH) techniques to identify the vibrating
sources. This paper shows that, for convex homogeneous plates with arbitrary
boundary conditions, new regularization schemes can be developed, based on the
sparsity of the normal velocity of the plate in a well-designed basis, i.e. the
possibility to approximate it as a weighted sum of few elementary basis
functions. In particular, these new techniques can handle discontinuities of
the velocity field at the boundaries, which can be problematic with standard
techniques. This comes at the cost of a higher computational complexity to
solve the associated optimization problem, though it remains easily tractable
with out-of-the-box software. Furthermore, this sparsity framework allows us to
take advantage of the concept of Compressive Sampling: under some conditions on
the sampling process (here, the design of a random array, which can be
numerically and experimentally validated), it is possible to reconstruct the
sparse signals with significantly less measurements (i.e., microphones) than
classically required. After introducing the different concepts, this paper
presents numerical and experimental results of NAH with two plate geometries,
and compares the advantages and limitations of these sparsity-based techniques
over standard Tikhonov regularization.Comment: Journal of the Acoustical Society of America (2012
The Lock-free -LSM Relaxed Priority Queue
Priority queues are data structures which store keys in an ordered fashion to
allow efficient access to the minimal (maximal) key. Priority queues are
essential for many applications, e.g., Dijkstra's single-source shortest path
algorithm, branch-and-bound algorithms, and prioritized schedulers.
Efficient multiprocessor computing requires implementations of basic data
structures that can be used concurrently and scale to large numbers of threads
and cores. Lock-free data structures promise superior scalability by avoiding
blocking synchronization primitives, but the \emph{delete-min} operation is an
inherent scalability bottleneck in concurrent priority queues. Recent work has
focused on alleviating this obstacle either by batching operations, or by
relaxing the requirements to the \emph{delete-min} operation.
We present a new, lock-free priority queue that relaxes the \emph{delete-min}
operation so that it is allowed to delete \emph{any} of the smallest
keys, where is a runtime configurable parameter. Additionally, the
behavior is identical to a non-relaxed priority queue for items added and
removed by the same thread. The priority queue is built from a logarithmic
number of sorted arrays in a way similar to log-structured merge-trees. We
experimentally compare our priority queue to recent state-of-the-art lock-free
priority queues, both with relaxed and non-relaxed semantics, showing high
performance and good scalability of our approach.Comment: Short version as ACM PPoPP'15 poste
MIMO radar spaceâtime adaptive processing using prolate spheroidal wave functions
In the traditional transmitting beamforming radar system, the transmitting antennas send coherent waveforms which form a highly focused beam. In the multiple-input multiple-output (MIMO) radar system, the transmitter sends noncoherent (possibly orthogonal) broad (possibly omnidirectional) waveforms. These waveforms can be extracted at the receiver by a matched filterbank. The extracted signals can be used to obtain more diversity or to improve the spatial resolution for clutter. This paper focuses on spaceâtime adaptive processing (STAP) for MIMO radar systems which improves the spatial resolution for clutter. With a slight modification, STAP methods developed originally for the single-input multiple-output (SIMO) radar (conventional radar) can also be used in MIMO radar. However, in the MIMO radar, the rank of the jammer-and-clutter subspace becomes very large, especially the jammer subspace. It affects both the complexity and the convergence of the STAP algorithm. In this paper, the clutter space and its rank in the MIMO radar are explored. By using the geometry of the problem rather than data, the clutter subspace can be represented using prolate spheroidal wave functions (PSWF). A new STAP algorithm is also proposed. It computes the clutter space using the PSWF and utilizes the block-diagonal property of the jammer covariance matrix. Because of fully utilizing the geometry and the structure of the covariance matrix, the method has very good SINR performance and low computational complexity
Transformations of High-Level Synthesis Codes for High-Performance Computing
Specialized hardware architectures promise a major step in performance and
energy efficiency over the traditional load/store devices currently employed in
large scale computing systems. The adoption of high-level synthesis (HLS) from
languages such as C/C++ and OpenCL has greatly increased programmer
productivity when designing for such platforms. While this has enabled a wider
audience to target specialized hardware, the optimization principles known from
traditional software design are no longer sufficient to implement
high-performance codes. Fast and efficient codes for reconfigurable platforms
are thus still challenging to design. To alleviate this, we present a set of
optimizing transformations for HLS, targeting scalable and efficient
architectures for high-performance computing (HPC) applications. Our work
provides a toolbox for developers, where we systematically identify classes of
transformations, the characteristics of their effect on the HLS code and the
resulting hardware (e.g., increases data reuse or resource consumption), and
the objectives that each transformation can target (e.g., resolve interface
contention, or increase parallelism). We show how these can be used to
efficiently exploit pipelining, on-chip distributed fast memory, and on-chip
streaming dataflow, allowing for massively parallel architectures. To quantify
the effect of our transformations, we use them to optimize a set of
throughput-oriented FPGA kernels, demonstrating that our enhancements are
sufficient to scale up parallelism within the hardware constraints. With the
transformations covered, we hope to establish a common framework for
performance engineers, compiler developers, and hardware developers, to tap
into the performance potential offered by specialized hardware architectures
using HLS
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