493 research outputs found
A hybrid queueing model for fast broadband networking simulation
PhDThis research focuses on the investigation of a fast simulation method for broadband
telecommunication networks, such as ATM networks and IP networks. As a result of
this research, a hybrid simulation model is proposed, which combines the analytical
modelling and event-driven simulation modelling to speeding up the overall
simulation.
The division between foreground and background traffic and the way of dealing with
these different types of traffic to achieve improvement in simulation time is the major
contribution reported in this thesis. Background traffic is present to ensure that proper
buffering behaviour is included during the course of the simulation experiments, but
only the foreground traffic of interest is simulated, unlike traditional simulation
techniques. Foreground and background traffic are dealt with in a different way.
To avoid the need for extra events on the event list, and the processing overhead,
associated with the background traffic, the novel technique investigated in this
research is to remove the background traffic completely, adjusting the service time of
the queues for the background traffic to compensate (in most cases, the service time
for the foreground traffic will increase). By removing the background traffic from the
event-driven simulator the number of cell processing events dealt with is reduced
drastically.
Validation of this approach shows that, overall, the method works well, but the
simulation using this method does have some differences compared with experimental
results on a testbed. The reason for this is mainly because of the assumptions behind
the analytical model that make the modelling tractable.
Hence, the analytical model needs to be adjusted. This is done by having a neural
network trained to learn the relationship between the input traffic parameters and the
output difference between the proposed model and the testbed. Following this
training, simulations can be run using the output of the neural network to adjust the
analytical model for those particular traffic conditions.
The approach is applied to cell scale and burst scale queueing to simulate an ATM
switch, and it is also used to simulate an IP router. In all the applications, the method
ensures a fast simulation as well as an accurate result
Application of learning algorithms to traffic management in integrated services networks.
SIGLEAvailable from British Library Document Supply Centre-DSC:DXN027131 / BLDSC - British Library Document Supply CentreGBUnited Kingdo
Quality of service modeling and analysis for carrier ethernet
Today, Ethernet is moving into the mainstream evolving into a carrier grade technology. Termed as Carrier Ethernet it is expected to overcome most of the\ud
shortcomings of native Ethernet. It is envisioned to carry services end-to-end serving corporate data networking and broadband access demands as well as backhauling wireless traffic. As the penetration of Ethernet increases, the offered Quality of Service (QoS) will become increasingly important and a distinguishing factor between different service providers. The challenge is to meet the QoS requirements of end applications such as response times, throughput, delay and jitter by managing the network resources at hand. Since Ethernet was not designed to operate in large public networks it does not possess functionalities to address this issue. In this thesis we propose and analyze mechanisms which improve the QoS performance of Ethernet enabling it to meet the demands of the current and next generation services and applications.\u
Deadline-ordered parallel iterative matching with QoS guarantee.
by Lui Hung Ngai.Thesis (M.Phil.)--Chinese University of Hong Kong, 2000.Includes bibliographical references (leaves 56-[59]).Abstracts in English and Chinese.Chapter 1 --- Introduction --- p.1Chapter 1.1 --- Thesis Overview --- p.3Chapter 2 --- Background & Related work --- p.4Chapter 2.1 --- Scheduling problem in ATM switch --- p.4Chapter 2.2 --- Traffic Scheduling in output-buffered switch --- p.5Chapter 2.3 --- Traffic Scheduling in Input buffered Switch --- p.16Chapter 3 --- Deadline-ordered Parallel Iterative Matching (DLPIM) --- p.22Chapter 3.1 --- Introduction --- p.22Chapter 3.2 --- Switch model --- p.23Chapter 3.3 --- Deadline-ordered Parallel Iterative Matching (DLPIM) --- p.24Chapter 3.3.1 --- Motivation --- p.24Chapter 3.3.2 --- Algorithm --- p.26Chapter 3.3.3 --- An example of DLPIM --- p.28Chapter 3.4 --- Simulation --- p.30Chapter 4 --- DLPIM with static scheduling algorithm --- p.41Chapter 4.1 --- Introduction --- p.41Chapter 4.2 --- Static scheduling algorithm --- p.42Chapter 4.3 --- DLPIM with static scheduling algorithm --- p.48Chapter 4.4 --- An example of DLPIM with static scheduling algorithm --- p.50Chapter 5 --- Conclusion --- p.54Bibliography --- p.5
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