11 research outputs found

    Distributed Circuit Analysis and Design for Ultra-wideband Communication and sub-mm Wave Applications

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    This thesis explores research into new distributed circuit design techniques and topologies, developed to extend the bandwidth of amplifiers operating in the mm and sub-mm wave regimes, and in optical and visible light communication systems. Theoretical, mathematical modelling and simulation-based studies are presented, with detailed designs of new circuits based on distributed amplifier (DA) principles, and constructed using a double heterojunction bipolar transistor (DHBT) indium phosphide (InP) process with fT =fmax of 350/600 GHz. A single stage DA (SSDA) with bandwidth of 345 GHz and 8 dB gain, based on novel techniques developed in this work, shows 140% bandwidth improvement over the conventional DA design. Furthermore, the matrix-single stage DA (M-SSDA) is proposed for higher gain than both the conventional DA and matrix amplifier. A two-tier M-SSDA with 14 dB gain at 300 GHz bandwidth, and a three-tier M-SSDA with a gain of 20 dB at 324 GHz bandwidth, based on a cascode gain cell and optimized for bandwidth and gain flatness, are presented based on full foundry simulation tests. Analytical and simulation-based studies of the noise performance peculiarities of the SSDA and its multiplicative derivatives are also presented. The newly proposed circuits are fabricated as monolithic microwave integrated circuits (MMICs), with measurements showing 7.1 dB gain and 200 GHz bandwidth for the SSDA and 12 dB gain at 170 GHz bandwidth for the three-tier M-SSDA. Details of layout, fabrication and testing; and discussion of performance limiting factors and layout optimization considerations are presented. Drawing on the concept of artificial transmission line synthesis in distributed amplification, a new technique to achieve up to three-fold improvement in the modulation bandwidth of light emitting diodes (LEDs) for visible light communication (VLC) is introduced. The thesis also describes the design and application of analogue pre-emphasis to improve signal-to-noise ratio in bandwidth limited optical transceivers

    Microwave and Millimeter-Wave Signal Power Generation

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    Advances in Solid State Circuit Technologies

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    This book brings together contributions from experts in the fields to describe the current status of important topics in solid-state circuit technologies. It consists of 20 chapters which are grouped under the following categories: general information, circuits and devices, materials, and characterization techniques. These chapters have been written by renowned experts in the respective fields making this book valuable to the integrated circuits and materials science communities. It is intended for a diverse readership including electrical engineers and material scientists in the industry and academic institutions. Readers will be able to familiarize themselves with the latest technologies in the various fields

    Photonic and Electronic Co-integration for Millimetre-Wave Hybrid Photonic-Wireless Links

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    Photonic and Electronic Co-integration for Millimetre-Wave Hybrid Photonic-Wireless Links

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    Monolithic integration of 1.55 micron photodetectors with GaAs electronics for high speed optical communications

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    Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 1998.Includes bibliographical references (p. 178-194).Integrated optoelectronics has shown exciting promise for high speed optical communication systems. For better system performance and lower cost, monolithic optoelectronic integrated circuits (OEICs) are highly desirable. A novel optoelectronic integration technology for high performance OEICs was proposed and partially developed and termed Aligned Pillar Bonding (APB) process. The work began with applying GaAs-based Epitaxy-on-Electronics (EoE) technology to integrate matched pairs of 1.55 micron InGaAs photodetectors with high speed GaAs electronics, which requires the direct growth of InGaAs on lattice-mismatched GaAs substrates using molecular beam epitaxy (MBE). A customized OEIC chip was designed and fabricated. Lattice-mismatched MBE growth was studied and InGaAs photodetectors on GaAs were produced using the relaxed buffer growth. However, the device performance and uniformity deteriorated significantly from those on lattice-matched InP substrates, and thus unsuitable for high speed OEICs. Aligned pillar bonding (APB) process was hence proposed. APB integrates lattice mismatched materials using aligned, selective area wafer bonding at reduced temperature. The photonic device structures are grown on their lattice matched substrates under optimal growth condition. These structures are patterned into pillars, aligned and bonded into the designated wells on the electronic chips. Subsequent substrate removal and device fabrication results in high density OEICs. 1.55 micron InGaAs photodetectors on GaAs were demonstrated using reduced temperature Pd-assisted wafer bonding, resulting in superior device performance. While the conventional dry etching techniques are impractical to pattern the desired deep pillars, electron cyclotron resonance (ECR) enhanced reactive ion etching (RIE) of InP using chlorine/helium chemistry has been developed, resulting in fast, deep, smooth, and highly anisotropic etching at room temperature. The etching characteristics have been calibrated for both InP and GaAs. Fast etching of InGaP, InAlAs, AlAs, and GaP has also been demonstrated. The etched pillars were subsequently bonded onto a OEIC chip, and initial study of small area pillar to well bonding was performed. APB allows independent optimization of both photonics and electronics for OEIC integration, inherits the wealth of the existing electronics industry, maintains good planarization and high density, permits low parasitics and high performance, and is naturally compatible with large scale manufacturing.by Hao Wang.Ph.D

    Efficient wireless coverage of in-building environments with low electromagnetic impact

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    The city of tomorrow is a major integrating stake, which crosses a set of major broad spectrum domains. One of these areas is the instrumentation of this city and the ubiquity of the exchange of data, which will give the pulse of this city (sensors) and its breathing in a hyper-connected world within indoor and outdoor dense areas (data exchange, 5G and 6G). Within this context, the proposed doctorate project has the objective to realize cost- and energy- effective, short-range communication systems for the capillary wireless coverage of in-door environments with low electromagnetic impact and for highly dense outdoor networks. The result will be reached through the combined use of: 1) Radio over Fiber (RoF) Technology, to bring the Radio Frequency (RF) signal to the different areas to be covered. 2) Beamforming antennas to send in real time the RF power just in the direction(s) where it is really necessary

    Enhancing Digital Controllability in Wideband RF Transceiver Front-Ends for FTTx Applications

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    Enhancing the digital controllability of wideband RF transceiver front-ends helps in widening the range of operating conditions and applications in which such systems can be employed. Technology limitations and design challenges often constrain the extensive adoption of digital controllability in RF front-ends. This work focuses on three major aspects associated with the design and implementation of a digitally controllable RF transceiver front-end for enhanced digital control. Firstly, the influence of the choice of semiconductor technology for a system-on-chip integration of digital gain control circuits are investigated. The digital control of gain is achieved by utilizing step attenuators that consist of cascaded switched attenuation stages. A design methodology is presented to evaluate the influence of the chosen technology on the performance of the three conventionally used switched attenuator topologies for desired attenuation levels, and the constraints that the technology suitable for high amplification places on the attenuator performance are examined. Secondly, a novel approach to the integrated implementation of gain slope equalization is presented, and the suitability of the proposed approach for integration within the RF front-end is verified. Thirdly, a sensitivity-aware implementation of a peak power detector is presented. The increased employment of digital gain control also increases the requirements on the sensitivity of the power detector employed for adaptive power and gain control. The design, implementation, and measurement results of a state-of-the-art wideband power detector with high sensitivity and large dynamic range are presented. The design is optimized to provide a large offset cancellation range, and the influence of offset cancellation circuits on the sensitivity of the power detector is studied. Moreover, design considerations for high sensitivity performance of the power detector are investigated, and the noise contributions from individual sub-circuits are evaluated. Finally, a wideband RF transceiver front-end is realized using a commercially available SiGe BiCMOS technology to demonstrate the enhancements in the digital controllability of the system. The RF front-end has a bandwidth of 500 MHz to 2.5 GHz, an input dynamic range of 20 dB, a digital gain control range larger than 30 dB, a digital gain slope equalization range from 1.49 dB/GHz to 3.78 dB/GHz, and employs a power detector with a sensitivity of -56 dBm and dynamic range of 64 dB. The digital control in the RF front-end is implemented using an on-chip serial-parallel-interface (SPI) that is controlled by an external micro-controller. A prototype implementation of the RF front-end system is presented as part of an RFIC intended for use in optical transceiver modules for fiber-to-the-x applications
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