Invariance Principles and Observability in Switched Systems with an Application in Consensus

Using any nonnegative function with a nonpositive derivative along trajectories to define a virtual output, the classic LaSalle invariance principle can be extended to switched nonlinear time-varying (NLTV) systems, by considering the weak observability (WO) associated with this output. WO is what the output informs about the limiting behavior of state trajectories (hidden in the zero locus of the output). In the context of switched NLTV systems, WO can be explored using the recently established framework of limiting zeroing-output solutions. Adding to this, an extension of the integral invariance principle for switched NLTV systems with a new method to guarantee uniform global attractivity of a closed set (without assuming uniform Lyapunov stability or dwell-time conditions) is proposed. By way of illustrating the proposed method, a leaderless consensus problem for nonholonomic mobile robots with a switching communication topology is addressed, yielding a new control strategy and a new convergence result

High-precision fluorescence photometry for real-time biomarkers detection

Les derniers évènements planétaires et plus particulièrement l'avènement sans précédent du nouveau coronavirus augmente la demande pour des appareils de test à proximité du patient. Ceux-ci fonctionnent avec une batterie et peuvent identifier rapidement des biomarqueurs cibles. Pareils systèmes permettent aux utilisateurs, disposant de connaissances limitées en la matière, de réagir rapidement, par exemple dans la détection d'un cas positif de COVID-19. La mise en œuvre de l'élaboration d'un tel instrument est un projet multidisciplinaire impliquant notamment la conception de circuits intégrés, la programmation, la conception optique et la biologie, demandant tous une maîtrise pointue des détails. De plus, l'établissement des spécifications et des exigences pour mesurer avec précision les interactions lumière-échantillon s'additionnent au besoin d'expérience dans la conception et la fabrication de tels systèmes microélectriques personnalisés et nécessitent en elles-mêmes, une connaissance approfondie de la physique et des mathématiques. Ce projet vise donc à concevoir et à mettre en œuvre un appareil sans fil pour détecter rapidement des biomarqueurs impliqués dans des maladies infectieuses telles que le COVID-19 ou des types de cancers en milieu ambulatoire. Cette détection se fait grâce à des méthodes basées sur la fluorescence. La spectrophotométrie de fluorescence permet aux médecins d'identifier la présence de matériel génétique viral ou bactérien tel que l'ADN ou l'ARN et de les caractériser. Les appareils de paillasse sont énormes et gourmand énergétiquement tandis que les spectrophotomètres à fluorescence miniatuarisés disponibles dans le commerce sont confrontés à de nombreux défis. Ces appareils miniaturisés ont été découverts en tirant parti des diodes électroluminescentes (DEL) à semi-conducteurs peu coûteuses et de la technologie des circuits intégrés. Ces avantages aident les scientifiques à réduire les erreurs possibles, la consommation d'énergie et le coût du produit final utilisé par la population. Cependant, comme leurs homologues de paillasse, ces appareils POC doivent quantifier les concentrations en micro-volume d'analytes sur une large gamme de longueurs d'onde suivant le cadre d'une économie en ressources. Le microsystème envisagé bénéficie d'une approche de haute précision pour fabriquer une puce microélectronique CMOS. Ce procédé se fait de concert avec un boîtier personnalisé imprimé en 3D pour réaliser le spectrophotomètre à la fluorescence nécessaire à la détection quantitative d'analytes en microvolume. En ce qui a trait à la conception de circuits, une nouvelle technique de mise à auto-zeroing est appliquée à l'amplificateur central, celui-ci étant linéarisé avec des techniques de recyclage et de polarisation adaptative. Cet amplificateur central est entièrement différentiel et est utilisé dans un amplificateur à verrouillage pour récupérer le signal d'intérêt éclipsé par le bruit. De plus, l'augmentation de la sensibilité de l'appareil permet des mesures quantitatives avec des concentrations en micro-volume d'analytes ayant moins d'erreurs de prédiction de concentration. Cet avantage cumulé à une faible consommation d'énergie, un faible coût, de petites dimensions et un poids léger font de notre appareil une solution POC prometteuse dans le domaine de la spectrophotométrie de fluorescence. La validation de ce projet s'est fait en concevant, fabriquant et testant un prototype discret et sans fil. Son article de référence a été publié dans IEEE LSC 2018. Quant à la caractérisation et l'interprétation du prototype d'expériences in vitro à l'aide d'une interface MATLAB personnalisée, cet article a été publié dans IEEE Sensors journal (2021). Les circuits intégrés et les photodétecteurs ont été fabriqués ont été conçus et fabriqués par Cadence en 2019. Relativement aux solutions de circuit proposées, elles ont été fabriquées avec la technologie CMOS 180 nm et publiées lors de la conférence IEEE MWSCAS 2020. Tout comme cette dernière contribution, les expériences in vitro avec le dispositif proposé incluant la puce personnalisée et le boîtier imprimé en 3D ont été réalisés et les résultats électriques et optiques ont été soumis au IEEE Journal of Solid-State Circuits (JSSC 2022).The most recent and unprecedented experience of the novel coronavirus increases the demand for battery-operated near-patient testing devices that can rapidly identify the target biomarkers. Such systems enable end-users with limited resources to quickly get feedback on various medical tests, such as detecting positive COVID-19 cases. Implementing such a device is a multidisciplinary project dealing with multiple areas of expertise, including integrated circuit design, programming, optical design, and biology, each of which needs a firm grasp of details. Alongside the need for experience in designing and manufacturing custom microelectronic systems, establishing the specifications and requirements to precisely measure the light-sample interactions requires an in-depth knowledge of physics and mathematics. This project aims to design and implement a wireless point-of-care (POC) device to rapidly detect biomarkers involved in infectious diseases such as COVID-19 or different types of cancers in an ambulatory setting using fluorescence-based methods. Fluorescence spectrophotometry allows physicians to identify and characterize viral or bacterial genetic materials such as DNAs or RNAs. The benchtop devices that are currently available are bulky and power-hungry, whereas the commercially available miniaturized fluorescence spectrophotometers are facing many challenges. Many of these difficulties have been resolved in literature thanks to inexpensive semiconductor light-emitting diodes (LEDs) and integrated circuits technology. Such advantages aid scientists in decreasing the size, power consumption, and cost of the final product for end-users. However, like the benchtop counterparts, such POC devices must quantify micro-volume concentrations of analytes across a wide wave length range under an economy of resources. The envisioned microsystem benefits from a high-precision approach to fabricating a CMOS microelectronic chip combined with a custom 3D-printed housing. This implementation results in a fluorescence spectrophotometer for qualitative and quantitative detection of micro-volume analytes. In terms of circuit design, a novel switched-biasing ping-pong auto-zeroed technique is applied to the core amplifier, linearized with recycling and adaptive biasing techniques. The fully differential core amplifier is utilized within a lock-in amplifier to retrieve the signal of interest overshadowed by noise. Increasing the device's sensitivity allows quantitative measurements down to micro-volume concentrations of analytes with less concentration prediction error. Such an advantage, along with low-power consumption, low cost, low weight, and small dimensions, make our device a promising POC solution in the fluorescence spectrophotometry area. The approach of this project was validated by designing, fabricating, and testing a discrete and wireless prototype. Its conference paper was published in IEEE LSC 2018, and the prototype characterization and interpretation of in vitro experiments using a custom MATLAB interface were published in IEEE Sensors Journal (2021). The integrated circuits and photodetectors were designed and fabricated by the Cadence circuit design toolbox (2019). The proposed circuit solutions were fabricated with 180-nm CMOS technology and published at IEEE MWSCAS 2020 conference. As the last contribution, the in vitro experiments with the proposed device, including the custom chip and 3D-printed housing, were performed, and the electrical and optical results were submitted to the IEEE Journal of Solid-State Circuits (JSSC 2022)

Nonholonomic Hybrid Zero Dynamics for the Stabilization of Periodic Orbits: Application to Underactuated Robotic Walking

This brief addresses zero dynamics associated with relative degree one and two nonholonomic outputs for exponential stabilization of given periodic orbits for hybrid models of bipedal locomotion. Zero dynamics manifolds are constructed to contain the orbit while being invariant under both the continuous- and discrete-time dynamics. The associated restriction dynamics are termed the hybrid zero dynamics (HZD). Prior results on the HZD have mainly relied on input–output linearization of holonomic outputs and are referred to as holonomic HZD (H-HZD). This brief presents reduced-order expressions for the HZD associated with nonholonomic output functions referred to as nonholonomic HZD (NH-HZD). This brief systematically synthesizes NH-HZD controllers to stabilize periodic orbits based on a reduced-order stability analysis. A comprehensive study of H-HZD and NH-HZD is presented. It is shown that NH-HZD can stabilize a broader range of walking gaits that are not stabilizable through traditional H-HZD. The power of the analytical results is finally illustrated on a hybrid model of a bipedal robot through numerical simulations

Design Techniques for High Speed Low Voltage and Low Power Non-Calibrated Pipeline Analog to Digital Converters

The profound digitization of modern microelectronic modules made Analog-to- Digital converters (ADC) key components in many systems. With resolutions up to 14bits and sampling rates in the 100s of MHz, the pipeline ADC is a prime candidate for a wide range of applications such as instrumentation, communications and consumer electronics. However, while past work focused on enhancing the performance of the pipeline ADC from an architectural standpoint, little has been done to individually address its fundamental building blocks. This work aims to achieve the latter by proposing design techniques to improve the performance of these blocks with minimal power consumption in low voltage environments, such that collectively high performance is achieved in the pipeline ADC. Towards this goal, a Recycling Folded Cascode (RFC) amplifier is proposed as an enhancement to the general performance of the conventional folded cascode. Tested in Taiwan Semiconductor Manufacturing Company (TSMC) 0.18?m Complementary Metal Oxide Semiconductor (CMOS) technology, the RFC provides twice the bandwidth, 8-10dB additional gain, more than twice the slew rate and improved noise performance over the conventional folded cascode-all at no additional power or silicon area. The direct auto-zeroing offset cancellation scheme is optimized for low voltage environments using a dual level common mode feedback (CMFB) circuit, and amplifier differential offsets up to 50mV are effectively cancelled. Together with the RFC, the dual level CMFB was used to implement a sample and hold amplifier driving a singleended load of 1.4pF and using only 2.6mA; at 200MS/s better than 9bit linearity is achieved. Finally a power conscious technique is proposed to reduce the kickback noise of dynamic comparators without resorting to the use of pre-amplifiers. When all techniques are collectively used to implement a 1Vpp 10bit 160MS/s pipeline ADC in Semiconductor Manufacturing International Corporation (SMIC) 0.18[mu]m CMOS, 9.2 effective number of bits (ENOB) is achieved with a near Nyquist-rate full scale signal. The ADC uses an area of 1.1mm2 and consumes 42mW in its analog core. Compared to recent state-of-the-art implementations in the 100-200MS/s range, the presented pipeline ADC uses the least power per conversion rated at 0.45pJ/conversion-step

Integrated exhaust gas analysis system for aircraft turbine engine component testing

An integrated exhaust gas analysis system was designed and installed in the hot-section facility at the Lewis Research Center. The system is designed to operate either manually or automatically and also to be operated from a remote station. The system measures oxygen, water vapor, total hydrocarbons, carbon monoxide, carbon dioxide, and oxides of nitrogen. Two microprocessors control the system and the analyzers, collect data and process them into engineering units, and present the data to the facility computers and the system operator. Within the design of this system there are innovative concepts and procedures that are of general interest and application to other gas analysis tasks

A Novel High Speed Cmos Comparator With Low Power Disipation And Low Offset

A Novel High Speed CMOS Comparator with low power dissipation, low offset, low noise and high speed is proposed. Inputs are reconfigured from typical differential pair comparator such that near equal current distribution in the input transistors can be achieved for a meta-stable point of the comparator. Restricted signal swing clock for the tail current is also used to ensure constant currents in the differential pairs. Nearly 18 mv offset voltage is easily achieved with the proposed structure making it favourable for flash and pipeline data conversion applications. The proposed topology is based on hysteresis using positive feedback, has a small power dissipation, less area, and it is shown to be very robust against transistor mismatch, noise immunity. Test structures of the comparators, designed in GPDK 90 nm are measured to determine offset –voltage, power - dissipation and speed. These are compared and the superior features of the proposed comparator are established

Switched Capacitor Circuit Techniques for High Performance CMOS Analog Circuits

Switched capacitor (SC) circuits are the main building blocks in many structures such as filters, data converters, sampling circuits and sampled-data amplifiers. The key challenge is to design such circuits which are the prime components of any IoT system with low power consumption without compromising on the performance. In this dissertation, power efficient novel switched capacitor techniques have been explored to suppress noise and mitigate the slewing in switched capacitor-based analog to digital converters (ADCs). First, a two-step incremental ADC(IADC) with pseudo-pseudo differential (PPD) structure is presented. PPD integrators are implemented with added correlated level shifting (CLS) technique to relax the output swing and gain requirements of the operational transconductance amplifier (OTA). The two-step IADC is implemented with the first step configured as a single-bit first-order IADC and the second step, using a two-capacitor SAR-assisted extended counting to further enhances the accuracy. The design is demonstrated by implementing the prototype in 65nm CMOS technology. Second, new passive charge compensation techniques are described. The proposed techniques mitigate the slewing in the OTA by providing a controlled amount of charge to the output of the OTA. The effectiveness of the proposed charge compensation technique in a switched-capacitor integrator is demonstrated in a second-order DSM. Circuit-level simulations including the effects of process, voltage and temperature variations are also presented. The extracted simulation results show a 12 dB improvement in SNDR using the proposed technique compared to conventional DSM without charge compensation

Upper Extremity Kinematic and Kinetic Comparison of Anterior Versus Posterior Walkers During Functional Activities in Children with Cerebral Palsy

Introduction: Investigating the differences in upper extremity (UE) joint biomechanics between anterior and posterior walkers has been explored in limited contexts, even though research has shown that prolonged use of walking aids can lead to UE joint weakening or musculoskeletal injuries. Recent studies have investigated some of these differences in children with spastic diplegic cerebral palsy (CP) during gait; however, no research has been conducted that compare these UE joint biomechanical differences during functional activities or activities of daily living (ADLs). The aim of this study is to use motion analysis to compare kinematic and kinetic differences between anterior and posterior walker use during representations of ADLs at the glenohumeral (GH) joint. Methods: Ten children ages 6-18 (mean age 13.27), 4 males and 6 females, were recruited to complete gait, reaching, and sit-to-stand/stand-to-sit tasks for kinematic analysis. One subject was chosen as a representative subject, and kinetic data was analyzed for gait and reaching tasks. Data was collected at Shriner’s Hospital for Children (Chicago, IL) in the Motion Analysis Laboratory using a specially designed walker that could be switched between anterior and posterior styles. Results: During gait, statistically significant differences were found in maximum flexion/extension angles at the dominant GH joint, with posterior walkers averaging greater minimum extension (-14.81 degrees +/- 20.83) compared to posterior walkers (-27.35 degrees +/- 13.60), as well as significant differences in the flexion/extension ROM in the dominant GH joint, with anterior walkers averaging 24.02 degrees +/- 15.95 versus 16..49 degrees +/- 8.26 for posterior walkers. During forward reaching, anterior walker usage resulted in an average reaching distance of 109.25mm +/- 76.65, which was statistically further than the 73.85mm +/-37.34 average seen during posterior walker usage. For sit-to-stand, anterior walker use resulted in an average of 4.82 seconds +/- 3.02, which was statistically faster than with a posterior walker (15.08 seconds +/-6.47). For stand-to-sit, posterior walker use resulted in an average of 5.89 seconds +/- 2.40, which was statistically faster than with an anterior walker (10.41 seconds +/-5.44). For kinetics during gait, the subject demonstrated a statistically significant increase in maximum anterior force (21.38 %BW +/- 3.54) and a greater maximum inferior force (-21.55 %BW +/- 2.65) for the dominant GH joint with an anterior walker versus a posterior walker. During forward reaching, peak anterior forces acting at the non-dominant GH joint (maximum 8.35 %BW +/- 0.21, minimum 5.68 %BW +/- 0.90) were significantly different between anterior and posterior walker usage. Also, a significantly different maximum medial force (-16.75 %BW +/- 1.85) was detected for posterior walkers. For moments, anterior walker usage resulted in a significantly greater minimum adduction moment (1.27 %BWxH +/- 0.04), and significantly greater peak internal rotation moments (maximum 1.56 %BWxH +/- 0.13, minimum 1.17 %BWxH +/- 0.03; Tables 8, 9; Figure 4). During lateral reaching, a significantly greater minimum medial force occurred at the non-dominant GH joint when using an anterior walker (11.29 %BW +/- 1.78). Anterior walker use resulted in significantly greater peak internal rotation moments (maximum 1.70 %BWxH +/- 0.37, minimum 1.51 %BWxH +/- 0.31), whereas posterior walker use led to a significantly greater maximum flexion moment (1.63 %BWxH +/- 0.12). Conclusion: Anterior and posterior walker use during gait and functional activities results in different kinematic and kinetic values in the GH joint, all of which should be considered during the walker prescription process