Testing Embedded Memories in Telecommunication Systems

Extensive system testing is mandatory nowadays to achieve high product quality. Telecommunication systems are particularly sensitive to such a requirement; to maintain market competitiveness, manufacturers need to combine reduced costs, shorter life cycles, advanced technologies, and high quality. Moreover, strict reliability constraints usually impose very low fault latencies and a high degree of fault detection for both permanent and transient faults. This article analyzes major problems related to testing complex telecommunication systems, with particular emphasis on their memory modules, often so critical from the reliability point of view. In particular, advanced BIST-based solutions are analyzed, and two significant industrial case studies presente

The test ability of an adaptive pulse wave for ADC testing

In the conventional ADC production test method, a high-quality analogue sine wave is applied to the Analogue-to-Digital Converter (ADC), which is expensive to generate. Nowadays, an increasing number of ADCs are integrated into a system-on-chip (SoC) platform design, which usually contains a digital embedded processor. In such a platform, a digital pulse wave is obviously less expensive to generate than an accurate analogue sine wave. As a result, the usage of a digital pulse wave has been investigated to test ADCs as the test stimulus. In this paper, the ability of a digital adaptive pulse wave for ADC testing is presented via the measurement results. Instead of the conventional FFT analysis, a time-domain analysis is exploited for post-processing, from which a signature result can be obtained. This signature can distinguish between faulty devices and the fault-free devices. It is also used in the machine-learning-based test method to predict the dynamic specifications of the ADC. The experimental results of a 12-bit 80 M/s pipelined ADC are shown to evaluate the sensitivity and accuracy of using a pulse wave to test an ADC

Do Family Caps Reduce Out-of-Wedlock Births? Evidence from Arkansas, Georgia, Indiana, New Jersey and Virginia

Using Current Population Survey (CPS) data from 1989 to 1999, we examine the impact of family cap policies, which deny incremental welfare benefits, on out-of-wedlock birth rates. We use the first five states that were granted waivers from the Department of Health and Human Services to implement family caps as "natural experiments." Specifically, we compare trends in out-of-wedlock birth rates in Arkansas, Georgia, Indiana, New Jersey and Virginia to trends in states that did not implement family caps or any other waivers prior to the Personal Responsibility and Work Opportunity Reconciliation Act (PRWORA). We employ several techniques to increase the credibility of results from our "natural experiment," such as the inclusion of multiple comparison groups, controls for differential time trends, and "difference-in-difference-indifferences" estimators. Our regression estimates generally do not provide evidence that family cap policies reduce the incidence of out-of-wedlock births among single, less-educated women with children.Welfare, Family Caps, Fertility

Analog sinewave signal generators for mixed-signal built-in test applications

This work presents a technique for the generation of analog sinusoidal signals with high spectral quality and reduced circuitry resources. Two integrated demonstrators are presented to show the feasibility of the approach. The proposed generation technique is based on a modified analog filter that provides a sinusoidal output as the response to a DC input. It has the attributes of digital programming and control, low area overhead, and low design effort, which make this approach very suitable as test stimulus generator for built-in test applications. The demonstrators—a continuous-time generator and a discrete-time one—have been integrated in a standard 0.35 μm CMOS technology. Simulation results and experimental measurements in the lab are provided, and the obtained performance is compared to current state-of-the-art on-chip generation strategies.Gobierno de España TEC2007-68072/MIC, TSI-020400-2008-71/MEDEA+2A105, CATRENE CT302Junta de Andalucía P09-TIC-538

The Impact of Fed Policy Announcements on Emerging Stock Markets: Evidence from Borsa Istanbul

This paper aims to understand the impact of US nonfarm payroll announcements on emerging stock markets through concentrating on the Turkish Stock Exchange: BIST 100. We not only investigate the impact of each of the three components of the nonfarm payroll data for the whole period under consideration, but also look for possible differences among four sub-periods. A comparative analysis leads us to conclude that it is not the nonfarm payroll which significantly affect BIST 100, but the fact that it is regarded as an important indicator to foresee Fed’s policy actions that can alter the capital flows