222 research outputs found

    Programmiersprachen und Rechenkonzepte

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    Seit 1984 veranstaltet die GI-Fachgruppe "Programmiersprachen und Rechenkonzepte" regelmäßig im Frühjahr einen Workshop im Physikzentrum Bad Honnef. Das Treffen dient in erster Linie dem gegenseitigen Kennenlernen, dem Erfahrungsaustausch, der Diskussion und der Vertiefung gegenseitiger Kontakte. In diesem Forum werden Vorträge und Demonstrationen sowohl bereits abgeschlossener als auch noch laufender Arbeiten vorgestellt, unter anderem (aber nicht ausschließlich) zu Themen wie - Sprachen, Sprachparadigmen, - Korrektheit von Entwurf und Implementierung, -Werkzeuge, -Software-/Hardware-Architekturen, -Spezifikation, Entwurf, - Validierung, Verifikation, - Implementierung, Integration, - Sicherheit (Safety und Security), - eingebettete Systeme, - hardware-nahe Programmierung. In diesem Technischen Bericht sind einige der präsentierten Arbeiten zusammen gestellt

    UVM testbench in Python:feature and performance comparison with SystemVerilog implementation

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    Abstract. Python is emerging as a new language for functional verification of digital integrated circuits (ICs). With the Python verification framework cocotb enabling to write testbenches in Python, new libraries are being developed for various verification techniques and methodologies, such as functional coverage, constrained random verification and Universal Verification Methodology (UVM). Python testbenches have been used in some research and product development, but there is little information available on their performance, and no studies about applying UVM in Python have been published. In this thesis, a Python UVM testbench was developed using pyuvm and other Python verification libraries for an AHB-Lite slave IP, and a matching testbench in SystemVerilog was also built to examine the differences in their implementations. Testbench codebase sizes, simulation execution times, memory use and coverage accumulation were compared. The Python testbench had 30% less lines of code, suggesting that testbench development may be faster in Python than SystemVerilog. The execution times of the Python testbench on commercial simulators were 8 to 21 times longer than those of the SystemVerilog testbench in tests with AHB-Lite write operations and random stimulus. In conclusion, given the performance gap and the UVM Register Abstraction Layer (RAL) being at an early stage of development in pyuvm, the studied Python libraries are not competitive with SystemVerilog and its UVM implementation for verifying complex designs like systems-on-chip (SoCs) at this stage. Nevertheless, pyuvm enables Python programmers and users of open-source simulators without support for SystemVerilog UVM to start using the methodology. A Python UVM testbench based on pyuvm is currently viable for verifying simple designs, and it opens new avenues of research in digital IC verification.Tiivistelmä. Python on nousemassa uudeksi kieleksi digitaalisten integroitujen piirien varmennukseen. Cocotb-viitekehys mahdollistaa testipenkkien kirjoittamisen Pythonilla, ja uusia Python-kirjastoja kehitetään eri varmennusmenetelmille, kuten funktionaaliselle kattavuudelle, rajoitetulla satunnaisherätteellä verifioinnille ja universaalille varmennusmenetelmälle (engl. Universal Verification Methodology, UVM). Python-testipenkkejä on pienissä määrin käytetty tutkimuksissa ja tuotekehityksessä, mutta niiden suorituskyvystä on hyvin vähän tietoa, ja UVM:n käytöstä Pythonilla ei ole julkaistu tutkimuksia. Tässä työssä kehitettiin UVM-testipenkki Pythonilla AHB-Lite-orjana toimivalle IP-lohkolle käyttäen pyuvm:ää ja muita Python-verifiointikirjastoja, ja vastaava testipenkki luotiin myös SystemVerilogilla toteutusten vertailua varten. Testipenkeistä verrattiin koodikannan kokoa, suoritusaikaa, muistin käyttöä ja kattavuuden kertymistä. Python-testipenkissä oli 30 % vähemmän koodirivejä, mikä voi merkitä, että testipenkkien kehittäminen Pythonilla on nopeampaa kuin SystemVerilogilla. Suoritusajat kaupallisilla simulaattoreilla oli Python-testipenkillä 8–21 kertaa pidempiä kuin SystemVerilog-testipenkillä testeissä, joissa ajettiin AHB-Lite -kirjoitusoperaatioita ja satunnaisherätettä. Koska suorituskykyero oli näin merkittävä, ja koska UVM:n rekisteriabstraktiotaso (engl. Register Abstraction Layer, RAL) on vasta alkutekijöissään pyuvm:ssä, voidaan todeta, että tutkitut Python-kirjastot eivät ole vielä nykyisellä tasollaan kilpailukykyisiä SystemVerilogin ja sen UVM-implementaation kanssa monimutkaisten piirien kuten järjestelmäpiirien varmennukseen. Siitä huolimatta pyuvm mahdollistaa UVM:n käytön Python-ohjelmoijille ja avoimen lähdekoodin simulaattoreissa, joissa ei ole vielä SystemVerilog UVM:lle tukea. Pyuvm-pohjainen Python UVM-testipenkki soveltuu tällä hetkellä yksinkertaisten mallien varmennukseen ja avaa uusia tutkimussuuntia digitaalisten integroitujen piirien varmennukseen

    Event-driven industrial robot control architecture for the Adept V+ platform

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    Modern industrial robotic systems are highly interconnected. They operate in a distributed environment and communicate with sensors, computer vision systems, mechatronic devices, and computational components. On the fundamental level, communication and coordination between all parties in such distributed system are characterized by discrete event behavior. The latter is largely attributed to the specifics of communication over the network, which, in terms, facilitates asynchronous programming and explicit event handling. In addition, on the conceptual level, events are an important building block for realizing reactivity and coordination. Eventdriven architecture has manifested its effectiveness for building loosely-coupled systems based on publish-subscribe middleware, either general-purpose or robotic-oriented. Despite all the advances in middleware, industrial robots remain difficult to program in context of distributed systems, to a large extent due to the limitation of the native robot platforms. This paper proposes an architecture for flexible event-based control of industrial robots based on the Adept V+ platform. The architecture is based on the robot controller providing a TCP/IP server and a collection of robot skills, and a high-level control module deployed to a dedicated computing device. The control module possesses bidirectional communication with the robot controller and publish/subscribe messaging with external systems. It is programmed in asynchronous style using pyadept, a Python library based on Python coroutines, AsyncIO event loop and ZeroMQ middleware. The proposed solution facilitates integration of Adept robots into distributed environments and building more flexible robotic solutions with eventbased logic

    A study of the simula 67 language.

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    Asynchronous programming in the abstract behavioural specification language

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    Chip manufacturers are rapidly moving towards so-called manycore chips with thousands of independent processors on the same silicon real estate. Current programming languages can only leverage the potential power by inserting code with low level concurrency constructs, sacrificing clarity. Alternatively, a programming language can integrate a thread of execution with a stable notion of identity, e.g., in active objects.Abstract Behavioural Specification (ABS) is a language for designing executable models of parallel and distributed object-oriented systems based on active objects, and is defined in terms of a formal operational semantics which enables a variety of static and dynamic analysis techniques for the ABS models.The overall goal of this thesis is to extend the asynchronous programming model and the corresponding analysis techniques in ABS.Algorithms and the Foundations of Software technolog

    Synchronization of processes

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    The study of the synchronization of processes is a very interesting field. It-brings together concepts that have originated in the design of operating systems, and of high level programming languages. Also it is becoming clear that the design of algorithms for parallel execution is intimately connected with synchronization problems. Some specialized synchronization problems have arisen in the design of data base systems. Indeed, distributed data bases provide an example of distributed processing that has immense practical significance. To summarize, synchronization of processes is a universal activity whose importance is being felt throughout computer science. The time has therefore come for the synchronization of processes to be studied as a topic in its own right. In this course I am taking such a broad viewpoint, and am trying to integrate some aspects of operating systems, languages, and parallel algorithms. However, this being a first attempt, the integration is not as thorough as I would have wished. Also, in the short time at my disposal, I am not able to discuss several very important topics, such as reliability

    Flexible Composition of Robot Logic with Computer Vision Services

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    Vision-based robotics is an ever-growing field within industrial automation. Demands for greater flexibility and higher quality motivate manufacturing companies to adopt these technologies for such tasks as material handling, assembly, and inspection. In addition to the direct use in the manufacturing setting, robots combined with vision systems serve as highly flexible means for realization of prototyping test-beds in the R&D context.Traditionally, the problem areas of robotics and computer vision are attacked separately. An exception is the study of vision-based servo control, the focus of which constitutes control-theoretic aspects of vision-based robot guidance under assumption that robot joints can be controlled directly. The missing part is a systemic approach to implementing robotic application with vision sensing given industrial robots constrained by their programming interface. This thesis targets the development process of vision-based robotic systems in an event-driven environment. It focuses on design and composition of three functional components: (1) robot control function, (2) image acquisition function, and (3) image processing function. The thesis approaches its goal by a combination of laboratory results, a case study of an industrial company (Kongsberg Automotive AS), and formalization of computational abstractions and architectural solutions. The image processing function is tackled with the application of reactive pipelines. The proposed system development method allows for smooth transition from early-stage vision algorithm prototyping to the integration phase. The image acquisition function in this thesis is exposed in a service-oriented manner with the help of a flexible set of concurrent computational primitives. To realize control of industrial robots, a distributed architecture is devised, which supports composability of communication-heavy robot logic, as well as flexible coupling of the robot control node with vision services

    Функционално и императивно реактивно програмирање употребом генерализације монаде наставка у програмском језику C++.

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    Постоји велики број проблема који захтевају писање програмских система који имају компоненте које се извршавају међусобно асинхроно једне од других...There is a big class of problems that require software systems with asynchronously executed components..

    Proceedings of the 4th DIKU-IST Joint Workshop on the Foundations of Software

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