14 research outputs found

    A multi-family multi-processor education and development system.

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    A Microprocessor-Based Control, Scheme for a PWM Voltage-Fed Inverter with an Induction Heating Tank Load

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    In this paper, the flexibility of programmed control logic is exploited in the close loop control of a PWM thyristor voltage fed inverter supplying an induction heating tank load. The microprocessor used in the control is the MC6809 to which is interfaced the SY6522 versatile interface adapter (VIA). The microprocessor-based scheme performs the dual function of generating the thyristor gating signals as well as estimating and applying control actions to maintain the load power factor at unity and the power delivered to the load at a desired set-point value. The schemed also provides power circuit over-current and over-voltage protection against adverse changes in the inverter input supply and the load. The estimation  of the control variables of the control scheme proportional plus integral controllers constitute the main control program while the application of thyristor gating signals and closed loop control actions are carried out in response  to interrupts external to the microprocessor unit. Illustrative steady state and transient circuit of an experimental model of the induction heater are given

    Design of microprocessor-based hardware for number theoretic transform implementation

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    Number Theoretic Transforms (NTTs) are defined in a finite ring of integers Z (_M), where M is the modulus. All the arithmetic operations are carried out modulo M. NTTs are similar in structure to DFTs, hence fast FFT type algorithms may be used to compute NTTs efficiently. A major advantage of the NTT is that it can be used to compute error free convolutions, unlike the FFT it is not subject to round off and truncation errors. In 1976 Winograd proposed a set of short length DFT algorithms using a fewer number of multiplications and approximately the same number of additions as the Cooley-Tukey FFT algorithm. This saving is accomplished at the expense of increased algorithm complexity. These short length DFT algorithms may be combined to perform longer transforms. The Winograd Fourier Transform Algorithm (WFTA) was implemented on a TMS9900 microprocessor to compute NTTs. Since multiplication conducted modulo M is very time consuming a special purpose external hardware modular multiplier was designed, constructed and interfaced with the TMS9900 microprocessor. This external hardware modular multiplier allowed an improvement in the transform execution time. Computation time may further be reduced by employing several microprocessors. Taking advantage of the inherent parallelism of the WFTA, a dedicated parallel microprocessor system was designed and constructed to implement a 15-point WFTA in parallel. Benchmark programs were written to choose a suitable microprocessor for the parallel microprocessor system. A master or a host microprocessor is used to control the parallel microprocessor system and provides an interface to the outside world. An analogue to digital (A/D) and a digital to analogue (D/A) converter allows real time digital signal processing

    Synthesis of hardware systems from very high level behavioural specifications

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    Real-time control of industrial robots in multiple microcomputers

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    Imperial Users onl

    Software and hardware implementation of the RSA public key cipher

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    Cryptographic systems and their use in communications are presented. The advantages obtained by the use of a public key cipher and the importance of this in a commercial environment are stressed. Two two main public key ciphers are considered. The RSA public key cipher is introduced and various methods for implementing this cipher on a standard, nondedicated, 8 bit microprocessor are investigated. The performance of the different algorithms are evaluated and compared. Various ways of increasing the performance are considered. The limitations imposed by the performance on the practical use of the cipher are discussed. The importance of the key to the security of the cipher is assessed. Different forms of attack are mentioned and a procedure for generating keys, which minimise the probability of a sucessful attack is presented. This procedure is implemented on a minicomputer. Use of the method on personal computers or microprocessors is examined. Methods for performing multiplication in hardware, with particular emphasis on the use of these methods in modular multiplication, are detailed. An algorithm for performing part of the encryption function in hardware and the hardware necessary for it is described. Different methods for implementing the hardware are discussed and one is choosen. A description of the hardware unit is given. The design and development of an application specific integrated circuit (ASIC) to perform key elements of the encryption function is described. The various stages of the design process are detailed. The results expected from this device and its integration into the overall encryption scheme are presented

    A rationale and design of a microcomputer system for schools and colleges

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    Imperial Users onl

    A distributed control microprocessor system

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    Imperial Users onl

    Computer control of a barry research chirpsounder

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    This thesis describes the design and development of a computer-based controller together with additional hardware that greatly extends the capabilities of a Barry Research VOS-1 Chirpsounder. The measurement of the virtual height of the ionosphere as a function of frequency using pulse- and frequency-modulated carrier wave (FMCW techniques is described and the concept of the so called "digital" ionosonde is introduced. The modifications required for the standard Chirpsounder to perform as a versatile digital chirp ionosonde are discussed. Simplified block diagrams are used to describe the Controller hardware which is fully described in two comprehensive service manuals which have been included as appendices. Important aspects of the Controller software and data storage formats are described in detail. The emphasis is then placed on system capabilities. An operators' software manual which describes system initialization and operation in terms of system commands is included as an appendix. Results of tests at both Grahamstown, South Africa , and at the SANAE base in the Antarctic are presented

    WTEC panel report on European nuclear instrumentation and controls

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    Control and instrumentation systems might be called the 'brain' and 'senses' of a nuclear power plant. As such they become the key elements in the integrated operation of these plants. Recent developments in digital equipment have allowed a dramatic change in the design of these instrument and control (I&C) systems. New designs are evolving with cathode ray tube (CRT)-based control rooms, more automation, and better logical information for the human operators. As these new advanced systems are developed, various decisions must be made about the degree of automation and the human-to-machine interface. Different stages of the development of control automation and of advanced digital systems can be found in various countries. The purpose of this technology assessment is to make a comparative evaluation of the control and instrumentation systems that are being used for commercial nuclear power plants in Europe and the United States. This study is limited to pressurized water reactors (PWR's). Part of the evaluation includes comparisons with a previous similar study assessing Japanese technology
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