Development of a Novel Hybrid Multi-Junction Architecture for Silicon Solar Cells

Although existing technology can produce highly efficient solar cells, they remain commercially cost-prohibitive. A low-cost alternative was investigated in this research by developing a novel hybrid multi-junction silicon (HMJ-Si) solar cell architecture through modeling, fabrication, and testing. The architecture consists of stacked silicon solar cells with an air gap between them and was designed with metal grating contacts that exploit interference patterns for light management. The interference patterns were examined in MATLAB and verified using Lumerical FDTD Solutions. Development focused on wafer configuration; diffusion profile; front contact design; optical, electrical, and thermal loss reduction; and efficiency. The architecture was optimized using an unpolished-front, p-type top cell with 128nm of Si3N4, a butterfly front contact, and 400 m grating spaced 900 m apart; a polished-front, n-type bottom cell with 200 m grating spaced 1100 m apart; and both cells having an enhanced back surface field diffusion profile with 500nm silver contacts. Efficiency peaked at 8.42% using a silver-coated wafer in lieu of the bottom cell. The results indicate that the architecture is a viable solar cell design requiring additional research for optimization

Advanced development of double-injection, deep-impurity semiconductor switches

Deep-impurity, double-injection devices, commonly refered to as (DI) squared devices, represent a class of semiconductor switches possessing a very high degree of tolerance to electron and neutron irradiation and to elevated temperature operation. These properties have caused them to be considered as attractive candidates for space power applications. The design, fabrication, and testing of several varieties of (DI) squared devices intended for power switching are described. All of these designs were based upon gold-doped silicon material. Test results, along with results of computer simulations of device operation, other calculations based upon the assumed mode of operation of (DI) squared devices, and empirical information regarding power semiconductor device operation and limitations, have led to the conculsion that these devices are not well suited to high-power applications. When operated in power circuitry configurations, they exhibit high-power losses in both the off-state and on-state modes. These losses are caused by phenomena inherent to the physics and material of the devices and cannot be much reduced by device design optimizations. The (DI) squared technology may, however, find application in low-power functions such as sensing, logic, and memory, when tolerance to radiation and temperature are desirable (especially is device performance is improved by incorporation of deep-level impurities other than gold

Semiconductor lasers using diffused quantum-well structures

We assess the relative merits and prospects of using diffused quantum-well (QW) structures in semiconductor lasers. First, different techniques to achieve interdiffusion are analyzed and compared. Second, recent development of semiconductor lasers using interdiffusion technique is also discussed. Third, the optical properties of diffused QWs are studied. In addition, novel design of diffused QWs structures to maintain stable single-mode operation in semiconductor lasers is proposed. Finally, brief discussion and conclusion are given.published_or_final_versio

Development and evaluation of silicon drift chambers

Imperial Users onl

The automated array assembly task of the low-cost silicon solar array project, phase 2

Several specific processing steps as part of a total process sequence for manufacturing silicon solar cells were studied. Ion implantation was identified as the preferred process step for impurity doping. Unanalyzed beam ion implantation was shown to have major cost advantages over analyzed beam implantation. Further, high quality cells were fabricated using a high current unanalyzed beam. Mechanically masked plasma patterning of silicon nitride was shown to be capable of forming fine lines on silicon surfaces with spacings between mask and substrate as great as 250 micrometers. Extensive work was performed on advances in plated metallization. The need for the thick electroless palladium layer was eliminated. Further, copper was successfully utilized as a conductor layer utilizing nickel as a barrier to copper diffusion into the silicon. Plasma etching of silicon for texturing and saw damage removal was shown technically feasible but not cost effective compared to wet chemical etching techniques

Development of a microelectronic module Final report

Feasibility of operating gallium arsenide devices in high temperature microelectronic circuit

The processing of heteroepitaxial thin-film diamond for electronic applications

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Evaluation of Silicon Selective Epitaxial Growth Defects using the Sidewall Gate Controlled Diode

Selective Epitaxial Growth (SEG) of silicon has shown great potential for advanced integrated circuit technologies. Before SEG can be fully utilized, sidewall defects must be reduced or at least controlled. The phenomena responsible for these defects were not understood, therefore more quantification of the sidewall defects is necessary. Walled diodes have been used to measure the sidewall leakage currents, but are susceptible to problems which make them poor devices for comparing different sidewall interfaces. A new device structure, the Sidewall Gate Controlled Diode (SGCD), is presented for the quantification of the defects near the SEG sidewall. The SGCD is shown to have advantages over the use of walled diodes despite the complex fabrication process required to build it. The development of the fabrication process for this device and the verification of its useful operation are presented. After the operation of the SGCD was verified, the device was used to evaluate the effects of various SEG deposition parameters on the sidewall defect density. This study determined that lower temperature, slower growth rate depositions followed with an in-situ hydrogen anneal generally reduced the defect density. Inconsistencies in the results also indicated that the profile of the sidewall may also influence the defect density at the SEG/oxide sidewall