Printed Circuit Board (PCB) design process and fabrication

This module describes main characteristics of Printed Circuit Boards (PCBs). A brief history of PCBs is introduced in the first chapter. Then, the design processes and the fabrication of PCBs are addressed and finally a study case is presented in the last chapter of the module.Peer ReviewedPostprint (published version

Instantaneous model of a MESFET for use in linear and nonlinear circuit simulations

A formal approach for nonlinear modeling of FETs is presented. The intrinsic transistor is described by current and charge generators, that are instantaneously dependent on the two internal voltages. The extrinsic parasitic elements are also included. This instantaneous model is obtained from the small signal equivalent circuit computed at a number of bias points, by integration of the bias dependent elements. A program for using this model in nonlinear circuit analysis has been developed. The process has been carried out for two transistors, one being of low noise, and the other a power MESFET. Good agreement has been observed when comparing the nonlinear analysis with measured data. A solid-state power amplifier at 28 GHz has been designed using the power transistor, delivering 21 dBm at 1 dB compression point.Peer ReviewedPostprint (published version

Thermal and Electrical Parasitic Modeling for Multi-Chip Power Module Layout Synthesis

This thesis presents thermal and electrical parasitic modeling approaches for layout synthesis of Multi-Chip Power Modules (MCPMs). MCPMs integrate power semiconductor devices and drive electronics into a single package. As the switching frequency of power devices increases, the size of the passive components are greatly reduced leading to gains in efficiency and cost reduction. In order to increase switching frequency, electrical parasitics in MCPMs need to be reduced through tighter electronic integrations and smaller packages. As package size is decreased, temperature increases due to less heat dissipation capability. Thus, it is crucial to consider both thermal and electrical parasitics in order to avoid premature device failure. Traditionally, the evaluation of the temperature and electrical parasitics of an MCPM requires the layout to be changed iteratively by hand and verified via finite element analysis (FEA) tools. The novel thermal and electrical parasitics models developed in this thesis predict temperature and electrical parasitics of an MCPM according to varied layouts. Multi-Objective optimization methods are applied to the models to find optimal layouts and tradeoffs of MCPM layouts

Thermosonic flip chip interconnection using electroplated copper column arrays

Published versio

Design Space Evaluation for Resonant and Hard-charged Switched Capacitor Converters

USB Power Delivery enables a fixed ratio converter to operate over a wider range of output voltages by varying the input voltage. Of the DC/DC step-down converters powered from this type of USB, the hard-charged Switched Capacitor circuit is of interest to industry for its potential high power density. However implementation can be limited by circuit efficiency. In fully resonant mode, the efficiency can be improved while also enabling current regulation. This expands the possible applications into battery chargers and eliminates the need for a two-stage converter.In this work, the trade-off in power loss and area between the hard-charged and fully resonant switched capacitor circuit is explored using a technique that remains agnostic to inductor technology. The loss model for each converter is presented as well as discussion on the restrained design space due to parasitics in the passive components. The results are validated experimentally using GaN-based prototype converters and the respective design spaces are analyzed

BiCMOS Millimetre-wave low-noise amplifier

Abstract: Please refer to full text to view abstract.D.Phil. (Electrical and Electronic Engineering

The X-Hall Sensor: Toward Integrated Broadband Current Sensing

open8noThis paper presents the X-Hall sensor, a viable sensing architecture for implementing a silicon-integrated, broadband, current/magnetic sensor. The X-Hall sensor overcomes the bandwidth limit of the state-of-the-art Hall sensors by replacing the spinning-current technique with DC-biased-based, passive offset compensation. In this way, the X-Hall architecture removes the methodological bandwidth limit due to the spinning-current technique and allows for exploiting the Hall probe up to its practical limit, which is set by the parasitic capacitive effects. Moreover, the X-Hall architecture allows to push the practical bandwidth limit at higher frequencies due to both the removal of the switches inherent in the spinning-current approach and a specifically designed analog front-end. To this end, a differential-difference current-feedback amplifier (DDCFA) is proposed as analog front-end in the X-Hall sensor. A prototype of the proposed X-Hall architecture is implemented in BCD 0.16-µm silicon technology to experimentally assess the performance of the X-Hall architecture. The passive offset compensation implemented into the X-Hall architecture is frequency independent and preserves an adequate offset reduction performance, though less efficient than the spinning-current technique operated at low frequency. Experimental dynamic tests on the prototype identify the presence of an additive parasitic dynamic perturbation due to the package that prevents from fully exploiting the X-Hall prototype up to its designed bandwidth limit. However, the implementation of a post de-emphasis digital filter allows to mitigate for the dynamic perturbation and to experimentally achieve a sensor bandwidth of 4 MHz, which is the broadest bandwidth ever demonstrated by a purely Hall-effect based sensor.This work was supported in part by the ECSEL Joint Undertaking (JU) under Grant agreement No. 737434. This JU receives support from the European Union’s Horizon 2020 Research and Innovation Program and Germany, Slovakia, Netherlands, Spain, Italy. This work reflects only the authors’ view and the JU is not responsible for any use that may be made of the information it contains.embargoed_20210509Crescentini, M.; Ramilli, R.; Gibiino, G. P.; Marchesi, M.; Canegallo, R. A.; Romani, A.; Tartagni, M.; Traverso, P. A.Crescentini, M.; Ramilli, R.; Gibiino, G. P.; Marchesi, M.; Canegallo, R. A.; Romani, A.; Tartagni, M.; Traverso, P. A