303 research outputs found
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Analysis of a discrete-time single-server queue with bursty imputs for traffic control in ATM networks
Due to a large number of bursty traffic sources that an ATM network is expected to support, controlling network traffic becomes essential to provide a desirable level of network performance with its users. Admission control and traffic smoothing are among the most promising control techniques for an ATM network. To evaluate the performance of an ATM network when it is subject to admission control or traffic smoothing, we build a discrete-time single-server queueing model where a new call joins the existing calls.In our model. it is assumed that the cell arrivals from a new call follow a general distribution. It is also assumed that the aggregated arrivals of cells from the existing calls form batch arrivals with a general distribution for the batch size and a geometric distribution for the interarrival times of batches. We consider both finite and infinite buffer cases, and analytically obtain the waiting time distribution and cell loss probability for a new call and for existing calls. Our analysis is an exact one. Through numerical examples, we investigate how the network performance depends on the statistics of a new call (burstiness, time that a call stays in active or inactive state, etc.). We also demonstrate the effectiveness of traffic smoothing to reduce network congestion
Self-Similarity in a multi-stage queueing ATM switch fabric
Recent studies of digital network traffic have shown that arrival processes in such an environment are more accurately modeled as a statistically self-similar process, rather than as a Poisson-based one. We present a simulation of a combination sharedoutput queueing ATM switch fabric, sourced by two models of self-similar input. The effect of self-similarity on the average queue length and cell loss probability for this multi-stage queue is examined for varying load, buffer size, and internal speedup. The results using two self-similar input models, Pareto-distributed interarrival times and a Poisson-Zeta ON-OFF model, are compared with each other and with results using Poisson interarrival times and an ON-OFF bursty traffic source with Ge ometrically distributed burst lengths. The results show that at a high utilization and at a high degree of self-similarity, switch performance improves slowly with increasing buffer size and speedup, as compared to the improvement using Poisson-based traffic
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Survey of traffic control schemes and error control schemes for ATM networks
Among the techniques proposed for B-ISDN transfer mode, ATM concept is considered to be the most promising transfer technique because of its flexibility and efficiency. This paper surveys and reviews a number of topics related to ATM networks. Those topics cover congestion control, provision of multiple classes of traffic, and error control. Due to the nature of ATM networks, those issues are far more challenging than in conventional networks. Sorne of the more promising solutions to those issues are surveyed, and the corresponding results on performance are summarized. Future research problems in ATM protocol aspect are also presented
A hybrid queueing model for fast broadband networking simulation
PhDThis research focuses on the investigation of a fast simulation method for broadband
telecommunication networks, such as ATM networks and IP networks. As a result of
this research, a hybrid simulation model is proposed, which combines the analytical
modelling and event-driven simulation modelling to speeding up the overall
simulation.
The division between foreground and background traffic and the way of dealing with
these different types of traffic to achieve improvement in simulation time is the major
contribution reported in this thesis. Background traffic is present to ensure that proper
buffering behaviour is included during the course of the simulation experiments, but
only the foreground traffic of interest is simulated, unlike traditional simulation
techniques. Foreground and background traffic are dealt with in a different way.
To avoid the need for extra events on the event list, and the processing overhead,
associated with the background traffic, the novel technique investigated in this
research is to remove the background traffic completely, adjusting the service time of
the queues for the background traffic to compensate (in most cases, the service time
for the foreground traffic will increase). By removing the background traffic from the
event-driven simulator the number of cell processing events dealt with is reduced
drastically.
Validation of this approach shows that, overall, the method works well, but the
simulation using this method does have some differences compared with experimental
results on a testbed. The reason for this is mainly because of the assumptions behind
the analytical model that make the modelling tractable.
Hence, the analytical model needs to be adjusted. This is done by having a neural
network trained to learn the relationship between the input traffic parameters and the
output difference between the proposed model and the testbed. Following this
training, simulations can be run using the output of the neural network to adjust the
analytical model for those particular traffic conditions.
The approach is applied to cell scale and burst scale queueing to simulate an ATM
switch, and it is also used to simulate an IP router. In all the applications, the method
ensures a fast simulation as well as an accurate result
On scheduling input queued cell switches
Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lacks scalability owing to the speed up problem. Input-queued switching, on the other hand, is scalable, and is thus becoming an attractive alternative. This dissertation presents three approaches toward resolving the major problem encountered in input-queued switching that has prohibited the provision of quality of service guarantees.
First, we proposed a maximum size matching based algorithm, referred to as min-max fair input queueing (MFIQ), which minimizes the additional delay caused by back pressure, and at the same time provides fair service among competing sessions. Like any maximum size matching algorithm, MFIQ performs well for uniform traffic, in which the destinations of the incoming cells are uniformly distributed over all the outputs, but is not stable for non-uniform traffic. Subse-quently, we proposed two maximum weight matching based algorithms, longest normalized queue first (LNQF) and earliest due date first matching (EDDFM), which are stable for both uniform and non-uniform traffic. LNQF provides fairer service than longest queue first (LQF) and better traffic shaping than oldest cell first (OCF), and EDDEM has lower probability of delay overdue than LQF, LNQF, and OCF. Our third approach, referred to as store-sort-and-forward (SSF), is a frame based scheduling algorithm. SSF is proved to be able to achieve strict sense 100% throughput, and provide bounded delay and delay jitter for input-queued switches if the traffic conforms to the (r, T) model
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Performance analysis of error recovery and congestion control in high-speed networks
In the past few years, Broadband Integrated Services Digital Network (B-ISDN) has received increasing attention as a communication architecture capable of supporting multimedia applications. Among the techniques proposed to implement B-ISDN, Asynchronous Transfer Mode (ATM) is considered to be the most promising transfer technique because of its efficiency and flexibility.In ATM networks, the performance bottleneck of the network, which was once the channel transmission speed, is shifted to the processing speed at the network switching nodes and the propagation delay of the channel. This shift is because the high-speed channel increases the ratio of processing time to packet transmission time and also the ratio of propagation delay to packet transmission time. The increased processing overhead makes it difficult to implement hop-by-hop schemes, which may impose prohibitably high processing at each switching node. The increased propagation delay overhead makes traffic control in ATM a challenge since a large number of packets can be in transit between two ATM switching nodes. Because of these fundamental changes, control schemes developed for traditional networks may not perform efficiently, and thus, new network architectures (congestion control schemes, error control schemes, etc.) are required in ATM networks.In this dissertation, we first present an extensive survey of various traffic control schemes and network protocols for ATM networks. In this survey, possible traffic control schemes are examined, and problems of those schemes and their possible solutions are presented. Next, we investigate two key research issues in ATM networks (and other types of high-speed networks): the effects of protocol-processing overhead and the efficiency of traffic control schemes.We first investigate the effects of protocol-processing overhead on the performance of error recovery schemes. Specifically, we investigate the performance trade-offs between link-by-link and edge-to-edge error recovery schemes. Our results show that for a network with high-speed/low-error-rate channels, an edge-to-edge scheme gives a smaller delay than a link-by-link scheme. We then investigate the effectiveness of a priority packet discarding scheme, a congestion control mechanism suitable for high-speed networks. We derive loss probabilities for each stream and investigate the impact of burstiness of traffic streams on the performance of individual streams
A batch-service queueing model with a discrete batch Markovian arrival process
Queueing systems with batch service have been investigated extensively during the past decades. However, nearly all the studied models share the common feature that an uncorrelated arrival process is considered, which is unrealistic in several real-life situations. In this paper, we study a discrete-time queueing model, with a server that only initiates service when the amount of customers in system (system content) reaches or exceeds a threshold. Correlation is taken into account by assuming a discrete batch Markovian arrival process (D-BMAP), i.e. the distribution of the number of customer arrivals per slot depends on a background state which is determined by a first-order Markov chain. We deduce the probability generating function of the system content at random slot marks and we examine the influence of correlation in the arrival process on the behavior of the system. We show that correlation merely has a small impact on the threshold that minimizes the mean system content. In addition, we demonstrate that correlation might have a significant influence on the system content and therefore has to be included in the model
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