An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration

We empirically evaluate an undervolting technique, i.e., underscaling the circuit supply voltage below the nominal level, to improve the power-efficiency of Convolutional Neural Network (CNN) accelerators mapped to Field Programmable Gate Arrays (FPGAs). Undervolting below a safe voltage level can lead to timing faults due to excessive circuit latency increase. We evaluate the reliability-power trade-off for such accelerators. Specifically, we experimentally study the reduced-voltage operation of multiple components of real FPGAs, characterize the corresponding reliability behavior of CNN accelerators, propose techniques to minimize the drawbacks of reduced-voltage operation, and combine undervolting with architectural CNN optimization techniques, i.e., quantization and pruning. We investigate the effect of environmental temperature on the reliability-power trade-off of such accelerators. We perform experiments on three identical samples of modern Xilinx ZCU102 FPGA platforms with five state-of-the-art image classification CNN benchmarks. This approach allows us to study the effects of our undervolting technique for both software and hardware variability. We achieve more than 3X power-efficiency (GOPs/W) gain via undervolting. 2.6X of this gain is the result of eliminating the voltage guardband region, i.e., the safe voltage region below the nominal level that is set by FPGA vendor to ensure correct functionality in worst-case environmental and circuit conditions. 43% of the power-efficiency gain is due to further undervolting below the guardband, which comes at the cost of accuracy loss in the CNN accelerator. We evaluate an effective frequency underscaling technique that prevents this accuracy loss, and find that it reduces the power-efficiency gain from 43% to 25%.Comment: To appear at the DSN 2020 conferenc

Microspacecraft and Earth observation: Electrical field (ELF) measurement project

The Utah State University space system design project for 1989 to 1990 focuses on the design of a global electrical field sensing system to be deployed in a constellation of microspacecraft. The design includes the selection of the sensor and the design of the spacecraft, the sensor support subsystems, the launch vehicle interface structure, on board data storage and communications subsystems, and associated ground receiving stations. Optimization of satellite orbits and spacecraft attitude are critical to the overall mapping of the electrical field and, thus, are also included in the project. The spacecraft design incorporates a deployable sensor array (5 m booms) into a spinning oblate platform. Data is taken every 0.1 seconds by the electrical field sensors and stored on-board. An omni-directional antenna communicates with a ground station twice per day to down link the stored data. Wrap-around solar cells cover the exterior of the spacecraft to generate power. Nine Pegasus launches may be used to deploy fifty such satellites to orbits with inclinations greater than 45 deg. Piggyback deployment from other launch vehicles such as the DELTA 2 is also examined

Conical scan impact study. Volume 2: Small local user data processing facility

The impact of a conical scan versus a linear scan multispectral scanner (MSS) instrument on a small local-user data processing facility was studied. User data requirements were examined to determine the unique system rquirements for a low cost ground system (LCGS) compatible with the Earth Observatory Satellite (EOS) system. Candidate concepts were defined for the LCGS and preliminary designs were developed for selected concepts. The impact of a conical scan MSS versus a linear scan MSS was evaluated for the selected concepts. It was concluded that there are valid user requirements for the LCGS and, as a result of these requirements, the impact of the conical scanner is minimal, although some new hardware development for the LCGS is necessary to handle conical scan data

The 30/20 GHz flight experiment system, phase 2. Volume 2: Experiment system description

A detailed technical description of the 30/20 GHz flight experiment system is presented. The overall communication system is described with performance analyses, communication operations, and experiment plans. Hardware descriptions of the payload are given with the tradeoff studies that led to the final design. The spacecraft bus which carries the payload is discussed and its interface with the launch vehicle system is described. Finally, the hardwares and the operations of the terrestrial segment are presented

Low cost attitude control system scanwheel development

In order to satisfy a growing demand for low cost attitude control systems for small spacecraft, development of low cost scanning horizon sensor coupled to a low cost/low power consumption Reaction Wheel Assembly was initiated. This report addresses the details of the versatile design resulting from this effort. Tradeoff analyses for each of the major components are included, as well as test data from an engineering prototype of the hardware

High power phase locked laser oscillators

The feasibility of mechanizing an adaptive array of independent laser oscillators for generation of a high power coherent output was experimentally investigated. Tests were structured to evaluate component/system requirements for delivery of energy to a low-earth orbit satellite. Initial experiments addressed the control issues of phase locking unstable resonators at low power levels. A successful phase lock demonstration formed the basis for the design and fabrication of the high power, water-cooled, control mirror subsequently installed in the NASA LeRC high power laser. Tests were performed to characterize the operational limits of the laser system and included quantitative assessment of the frequency stability, noise sources, and optical properties of the beam

SIRU development. Volume 1: System development

A complete description of the development and initial evaluation of the Strapdown Inertial Reference Unit (SIRU) system is reported. System development documents the system mechanization with the analytic formulation for fault detection and isolation processing structure; the hardware redundancy design and the individual modularity features; the computational structure and facilities; and the initial subsystem evaluation results

Index to 1981 NASA Tech Briefs, volume 6, numbers 1-4

Short announcements of new technology derived from the R&D activities of NASA are presented. These briefs emphasize information considered likely to be transferrable across industrial, regional, or disciplinary lines and are issued to encourage commercial application. This index for 1981 Tech Briefs contains abstracts and four indexes: subject, personal author, originating center, and Tech Brief Number. The following areas are covered: electronic components and circuits, electronic systems, physical sciences, materials, life sciences, mechanics, machinery, fabrication technology, and mathematics and information sciences