Technological University in 1984 and 1988, respectively

Abstract We present an analysis comparing multi-level signaling to standard NRZ signaling for module-to-module on-board electrical interconnects. To study on-board electrical performance, duobinary and PAM4 I/O models were created and compared to NRZ signaling in behavioral link-level simulations. A great variety of high-density, high-speed on-board module-to-module electrical links were analyzed, and specific interconnect channels were validated experimentally with programmable equalization transceiver chips communicating through a set of fabricated test structures. Link performance was measured with on-chip eye monitoring circuits and an oscilloscope. Simulation results show that NRZ signaling with FFE and DFE equalization offers the best electrical performance

De-embedding method for electrical response extraction of through-silicon via (TSV) in silicon interposer technology and signal integrity performance comparison with embedded multi-die interconnect bridge (EMIB) technology

Traditional two-dimensional system-in-package (2D SiP) can no longer support the scaling of size, power, bandwidth, and cost at the same rate required by Moore\u27s Law. Three-dimensional integrated circuits (3D-ICs), 2.5D silicon interposer technology in which through silicon vias are widely used, are implemented to meet these challenges. Embedded multi-die interconnect bridge (EMIB) technology are proposed as well. In Section 1, a novel de-embedding method is proposed for TSV characterization by using a set of simple yet efficient test patterns. Full wave models and corresponding equivalent circuits are provided to explain the electrical performance of the test patterns clearly. Furthermore, broadband measurement is performed for all test patterns up to 40 GHz, to verify the accuracy of the developed full wave models. Scanning Electron Microscopy (SEM) measurements are taken for all the test patterns to optimize the full wave models. Finally, the proposed de-embedding method is applied to extract the response of the TSV pair. Good agreement between the de-embedded results with analytical characterization and the full-wave simulation for a single TSV pair indicates that the proposed de-embedding method works effectively up to 40 GHz. In Section 2, the signal integrity performance of EMIB technology is evaluated and compared with silicon interposer technology. Two examples are available for each technology, one is simple with only one single trace pair considered; the other is complex with three differential pairs considered in the full wave simulation. Results of insertion loss, return loss, crosstalk and eye diagram are provided as criteria to evaluate the signal integrity performance for both technologies. This work provides guidelines to both top-level decision and specific IC or channel design --Abstract, page iii

A Micromachined Millimeter-Wave Radar Technology for Indoor Navigation

A compact, light-weight, low-power MMW radar system operating at 240 GHz is introduced to enable autonomous navigation of micro robotic platforms in complex environments. The short wavelength at the operating frequency band (1.25mm @ 240 GHz) enables implementation of the radar front-end components on a silicon wafer stack using micromachining techniques. This work presents the design, fabrication technology, and measurement methodology of components for the micromachined MMW radar and the phenomenology of such radars in indoor environments. Novel passive structures are developed to realize a fully micromachined radar front-end. Low loss cavity-backed CPW (CBCPW) lines (0.12 dB/mm @ 240 GHz), broadband transitions from the CBCPW line to rectangular waveguide (IL13 dB; BW: 39%), MMIC chip integration transitions, and waveguide directional couplers are designed to fully integrate active and passive components of the radar. Also a membrane-supported miniaturized-element FSS image-reject filter (IL25 dB in the stopband) is developed for MMW radar applications. The structures are designed compatible with micromachining technology and optimized for minimum insertion loss. The designed components are then realized over a two layer stack of silicon wafers. Multi-step structures are realized on one of the wafers and the membrane-supported features are implemented on the other wafer. A novel multistep DRIE technique is utilized to enhance the profile quality of the fabricated structures. Measurement techniques are developed to enable accurate and repeatable characterization of the on-wafer components at MMW and higher frequency bands. A novel waveguide probe S-parameter measurement technique is introduced for non-contact characterization of the multi-port components using a two-port network analyzer. To examine the utilization of the proposed 240 GHz radar for collision avoidance and building interior mapping applications, the interaction of electromagnetic waves with objects in the indoor environments is investigated. An instrumentation radar is utilized to collect backscatter data from corridors in an indoor setting. The collected data is used to form radar images for obstacle detection. The radar images are co-registered in a global coordinate matrix to form a complete map of the interior layout. Image processing techniques are used to enhance the final layout map.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/107273/1/moallem_1.pd

The 1993 Shuttle Small Payloads Symposium

The 1993 Shuttle Small Payloads Symposium is a combined symposia of the Get Away Special (GAS), Hitchhiker, and Complex Autonomous Payloads (CAP) programs, and is proposed to continue as an annual conference. The focus of this conference is to educate potential Space Shuttle Payload Bay users as to the types of carrier systems provided and for current users to share experiment concepts

Modeling EMI Resulting from a Signal Via Transition Through Power/Ground Layers

Signal transitioning through layers on vias are very common in multi-layer printed circuit board (PCB) design. For a signal via transitioning through the internal power and ground planes, the return current must switch from one reference plane to another reference plane. The discontinuity of the return current at the via excites the power and ground planes, and results in noise on the power bus that can lead to signal integrity, as well as EMI problems. Numerical methods, such as the finite-difference time-domain (FDTD), Moment of Methods (MoM), and partial element equivalent circuit (PEEC) method, were employed herein to study this problem. The modeled results are supported by measurements. In addition, a common EMI mitigation approach of adding a decoupling capacitor was investigated with the FDTD method

NIM: The Neutral Gas and Ion Mass Spectrometer to Explore the Galilean Ice Worlds

The JUpiter ICy moons Explorer (JUICE) of the European Space Agency (ESA) has the purpose to investigate Jupiter and its icy moons Europa, Ganymede and Callisto in great detail. Among other scientific goals, JUICE will investigate the Jupiter system as a potential habitable system because the three icy moons have subsurface oceans where life might be possible. On board of JUICE is the Particle Environment Package (PEP), which consists of six individual instruments measuring electrons, ions and neutral particles in an energy range from meV up to MeV. One of these six instruments is the Neutral gas and Ion Mass spectrometer (NIM) from the University of Bern. The NIM instrument is designed to measure the chemical and isotope composition of the icy moons’ exospheres during the flybys of JUICE of the icy moons and also during JUICE final destination in Ganymede’s orbit. Knowing the chemical and isotope composition allows to investigate the origin and evolution processes involved in the formation processes of the icy moons, Jupiter and our solar system. NIM is a time-of-flight mass spectrometer able to measure thermal neutral molecules and ionospheric ions. This thesis shows the journey from finalising the flight design of the NIM instrument to the actual testing, qualification, and calibration until delivery of the NIM Proto-Flight (PFM) instrument in December 2020 to the JUICE spacecraft. On this journey, different flight components were tested and analysed as they became available during the development and finalisation of the PFM and Flight-Spare (FS) instrument. From the foreseen scientific scope for the NIM instrument, a list of measurement requirements was delivered. This work shows that NIM PFM and NIM FS meet all these requirements

Multi-resonant passive components for power conversion

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005.Includes bibliographical references (p. 199-202).Semiconductor-device limitations to system miniaturization have receded, but exposed by their improvement numerous "ancillary" barriers which continue to preoccupy nearly every electronics industry. Prominent among these obstacles are package parasitics and heat, which have come to the fore as conventional circuits are applied in modern regimes of frequency and integration density. To an ever increasing extent, integration limits are symptoms of the fundamental frequency- and size-scaling limits of passive components. Power inductors and transformers, in particular, are challenging to miniaturize because of their poor performance when scaled down in size, and the difficulty of fabricating them with available planar processes. A family of approximating networks for transmission lines, the focus of this work, enables miniaturization by internally circulating energy and exchanging delay fidelity for bulk energy storage. These multi-resonant components are substantially smaller than their lumped counterparts, in particular requiring less inductance, and enforce useful waveform symmetries that can be traded for higher power or higher efficiency.Lumped analogs of transmission lines, and delay-based means of processing energy in general, exploit rather than fight the parasitics which can restrict conventional designs to lower switching frequencies, and are compatible with RF power-conversion techniques. Printed-circuit and wafer- or package-scale construction methods for multi-resonant structures are presented, along with power-converter topologies that exploit the waveform symmetries they enforce. A new soft-switched RF power converter is introduced, in particular, that demonstrates reductions in peak device stress and passive-component size. Taken together, the construction techniques, networks, and converter topologies presented here extend the power levels and applications for which passive components can be manufactured in an integrated fashion, within a printed circuit board or at the die/package scale alongside semiconductor switches and converter controls.by Joshua W. Phinney.Ph.D

Reliability Investigations of MOSFETs using RF Small Signal Characterization

Modern technology needs and advancements have introduced various new concepts such as Internet-of-Things, electric automotive, and Artificial intelligence. This implies an increased activity in the electronics domain of analog and high frequency. Silicon devices have emerged as a cost-effective solution for such diverse applications. As these silicon devices are pushed towards higher performance, there is a continuous need to improve fabrication, power efficiency, variability, and reliability. Often, a direct trade-off of higher performance is observed in the reliability of semiconductor devices. The acceleration-based methodologies used for reliability assessment are the adequate time-saving solution for the lifetime's extrapolation but come with uncertainty in accuracy. Thus, the efforts to improve the accuracy of reliability characterization methodologies run in parallel. This study highlights two goals that can be achieved by incorporating high-frequency characterization into the reliability characteristics. The first one is assessing high-frequency performance throughout the device's lifetime to facilitate an accurate description of device/circuit functionality for high-frequency applications. Secondly, to explore the potential of high-frequency characterization as the means of scanning reliability effects within devices. S-parameters served as the high-frequency device's response and mapped onto a small-signal model to analyze different components of a fully depleted silicon-on-insulator MOSFET. The studied devices are subjected to two important DC stress patterns, i.e., Bias temperature instability stress and hot carrier stress. The hot carrier stress, which inherently suffers from the self-heating effect, resulted in the transistor's geometry-dependent magnitudes of hot carrier degradation. It is shown that the incorporation of the thermal resistance model is mandatory for the investigation of hot carrier degradation. The property of direct translation of small-signal parameter degradation to DC parameter degradation is used to develop a new S-parameter based bias temperature instability characterization methodology. The changes in gate-related small-signal capacitances after hot carrier stress reveals a distinct signature due to local change of flat-band voltage. The measured effects of gate-related small-signal capacitances post-stress are validated through transient physics-based simulations in Sentaurus TCAD.:Abstract Symbols Acronyms 1 Introduction 2 Fundamentals 2.1 MOSFETs Scaling Trends and Challenges 2.1.1 Silicon on Insulator Technology 2.1.2 FDSOI Technology 2.2 Reliability of Semiconductor Devices 2.3 RF Reliability 2.4 MOSFET Degradation Mechanisms 2.4.1 Hot Carrier Degradation 2.4.2 Bias Temperature Instability 2.5 Self-heating 3 RF Characterization of fully-depleted Silicon on Insulator devices 3.1 Scattering Parameters 3.2 S-parameters Measurement Flow 3.2.1 Calibration 3.2.2 De-embedding 3.3 Small-Signal Model 3.3.1 Model Parameters Extraction 3.3.2 Transistor Figures of Merit 3.4 Characterization Results 4 Self-heating assessment in Multi-finger Devices 4.1 Self-heating Characterization Methodology 4.1.1 Output Conductance Frequency dependence 4.1.2 Temperature dependence of Drain Current 4.2 Thermal Resistance Behavior 4.2.1 Thermal Resistance Scaling with number of fingers 4.2.2 Thermal Resistance Scaling with finger spacing 4.2.3 Thermal Resistance Scaling with GateWidth 4.2.4 Thermal Resistance Scaling with Gate length 4.3 Thermal Resistance Model 4.4 Design for Thermal Resistance Optimization 5 Bias Temperature Instability Investigation 5.1 Impact of Bias Temperature Instability stress on Device Metrics 5.1.1 Experimental Details 5.1.2 DC Parameters Drift 5.1.3 RF Small-Signal Parameters Drift 5.2 S-parameter based on-the-fly Bias Temperature Instability Characterization Method 5.2.1 Measurement Methodology 5.2.2 Results and Discussion 6 Investigation of Hot-carrier Degradation 6.1 Impact of Hot-carrier stress on Device performance 6.1.1 DC Metrics Degradation 6.1.2 Impact on small-signal Parameters 6.2 Implications of Self-heating on Hot-carrier Degradation in n-MOSFETs 6.2.1 Inclusion of Thermal resistance in Hot-carrier Degradation modeling 6.2.2 Convolution of Bias Temperature Instability component in Hot-carrier Degradation 6.2.3 Effect of Source and Drain Placement in Multi-finger Layout 6.3 Vth turn-around effect in p-MOSFET 7 Deconvolution of Hot-carrier Degradation and Bias Temperature Instability using Scattering parameters 7.1 Small-Signal Parameter Signatures for Hot-carrier Degradation and Bias Temperature Instability 7.2 TCAD Dynamic Simulation of Defects 7.2.1 Fixed Charges 7.2.2 Interface Traps near Gate 7.2.3 Interface Traps near Spacer Region 7.2.4 Combination of Traps 7.2.5 Drain Series Resistance effect 7.2.6 DVth Correction 7.3 Empirical Modeling based deconvolution of Hot-carrier Degradation 8 Conclusion and Recommendations 8.1 General Conclusions 8.2 Recommendations for Future Work A Directly measured S-parameters and extracted Y-parameters B Device Dimensions for Thermal Resistance Modeling C Frequency response of hot-carrier degradation (HCD) D Localization Effect of Interface Traps Bibliograph